float_add_modue_synthesis_mhf_info.txt

来自「32位单精度浮点加法器」· 文本 代码 · 共 23 行

// Xilinx design hierarchy information file produced by netgen (P.28xd) 
// The information in this file is useful for 
//   - Design hierarchy relationship between modules 
//   - Bottom up compilation order (VHDL simulation) 
//
//  Design Name : float_add_modue
//
//  Module      : The name of the hierarchical design module.
//  Instance    : The instance name used in the parent module.
//  Design File : The name of the file that contains the module.
//  SubModule   : The sub module(s) contained within a given module.
//     Module, Instance : The sub module and instance names.

  Module	: glbl 
  Instance	: NONE 
  Design File	: glbl.v 
  SubModule	: NONE 

  Module      : float_add_modue
  Design File : float_add_modue_synthesis.v
  SubModule   : NONE