pa.fromhdl.tcl

32位单精度浮点加法器

# PlanAhead Launch Script for Pre-Synthesis Floorplanning, created by Project Navigator

create_project -name ha1 -dir "E:/kechengsheji/ha1/planAhead_run_1" -part xc7vx485tffg1761-2
set_param project.pinAheadLayout yes
set srcset [get_property srcset [current_run -impl]]
set_property target_constrs_file "float_add_modue.ucf" [current_fileset -constrset]
set hdlfile [add_files [list {../../float_add_modue/float_add_modue.v}]]
set_property file_type Verilog $hdlfile
set_property library work $hdlfile
set_property top float_add_modue $srcset
add_files [list {float_add_modue.ucf}] -fileset [get_property constrset [current_run]]
open_rtl_design -part xc7vx485tffg1761-2