ledrun.vhd

24秒倒计时系统（有跑马灯） 利用CPLD

LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.std_logic_unsigned.all;
USE IEEE.std_logic_arith.all;

entity ledrun is
	port(clk:in std_logic;
		mode:in std_logic;
		q:out std_logic_vector(17 downto 0)
		);
end ledrun;

architecture led of ledrun is
SIGNAL f:  STD_LOGIC_VECTOR(17 downto 0);
SIGNAL f_scan1: STD_LOGIC;
signal c : std_logic;

BEGIN
	q(17 downto 0) <= f(17 downto 0);
    counter:
	PROCESS
		VARIABLE d_ff: STD_LOGIC_VECTOR(20 downto 0);

	BEGIN
		WAIT UNTIL clk = '1';
		IF d_ff(20 downto 0) >= 2e6 THEN
		    d_ff(20 downto 0) := "000000000000000000000";
		ELSE
		    d_ff(20 downto 0) := d_ff + 1;
		END IF;
		f_scan1 <= not d_ff(20);	
	END PROCESS counter;
	
running:
	PROCESS(f_scan1)
	VARIABLE direction: STD_ULOGIC;
	BEGIN
	if f(17)='1' then c<='1';
   				 elsif f(0)='1'	then c<='0';        
				end if;
If (f_scan1 = '1' and f_scan1'EVENT) THEN
case mode is 
when '1'=>
			    IF f(17 downto 0) =  "000000000000000000" THEN
			       f(17 downto 0) <= "100000000000000001";
			    ELSIF f(17 downto 0) =  "111111111111111111" THEN
			       f(17 downto 0) <= "000000000000000000";
      	        ELSE 
       		       f(17 downto 0) <= ('1'& f(17 downto 9) & f(8 downto 0) & '1');
		    	END IF;
when others => f(17 downto 0) <= "000000000000000000";
end case;
end if;
end process running;
end led;