ivga.map.rpt

用VHDL写的计算器

    Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version
    Info: Processing started: Thu May 11 13:23:35 2006
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off Ivga -c Ivga
Info: Found 2 design units, including 1 entities, in source file Ivga.vhd
    Info: Found design unit 1: Ivga-beh
    Info: Found entity 1: Ivga
Info: Found 2 design units, including 1 entities, in source file vgainterface.vhd
    Info: Found design unit 1: VgaInterface-behavior
    Info: Found entity 1: VgaInterface
Info: Found 2 design units, including 1 entities, in source file cal.vhd
    Info: Found design unit 1: cal-behav
    Info: Found entity 1: cal
Info: Found 2 design units, including 1 entities, in source file bcd.vhd
    Info: Found design unit 1: bcd-Impl
    Info: Found entity 1: bcd
Info: Found 2 design units, including 1 entities, in source file bcd4adder.vhd
    Info: Found design unit 1: BCD4Adder-Impl
    Info: Found entity 1: BCD4Adder
Info: Found 2 design units, including 1 entities, in source file BCD4suber.vhd
    Info: Found design unit 1: BCD4suber-Impl
    Info: Found entity 1: BCD4suber
Info: Found 2 design units, including 1 entities, in source file Complementor.vhd
    Info: Found design unit 1: Complementor-Impl
    Info: Found entity 1: Complementor
Info: Found 2 design units, including 1 entities, in source file F4a_adder.vhd
    Info: Found design unit 1: F4a_adder-Impl
    Info: Found entity 1: F4a_adder
Info: Found 2 design units, including 1 entities, in source file f_adder.vhd
    Info: Found design unit 1: f_adder-fd
    Info: Found entity 1: f_adder
Info: Elaborating entity "Ivga" for the top level hierarchy
Info: Elaborating entity "cal" for hierarchy "cal:u1"
Info: VHDL Case Statement information at cal.vhd(67): OTHERS choice is never selected
Info: VHDL Case Statement information at cal.vhd(95): OTHERS choice is never selected
Info: Elaborating entity "bcd" for hierarchy "cal:u1|bcd:u1"
Info: Elaborating entity "BCD4Adder" for hierarchy "cal:u1|bcd:u1|BCD4Adder:ua"
Info: Elaborating entity "F4a_adder" for hierarchy "cal:u1|bcd:u1|BCD4Adder:ua|F4a_adder:u1"
Info: Elaborating entity "f_adder" for hierarchy "cal:u1|bcd:u1|BCD4Adder:ua|F4a_adder:u1|f_adder:u1"
Info: Elaborating entity "BCD4suber" for hierarchy "cal:u1|bcd:u1|BCD4suber:us"
Info: Elaborating entity "Complementor" for hierarchy "cal:u1|bcd:u1|BCD4suber:us|Complementor:u1"
Info: Elaborating entity "VgaInterface" for hierarchy "VgaInterface:u2"
Info: (10035) Verilog HDL or VHDL information at vgainterface.vhd(27): object "vga_hs" declared but not used
Info: (10035) Verilog HDL or VHDL information at vgainterface.vhd(28): object "vga_vs" declared but not used
Info: Using design file vga.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: vga-SYN
    Info: Found entity 1: vga
Info: Elaborating entity "vga" for hierarchy "VgaInterface:u2|vga:u1"
Info: Found 1 design units, including 1 entities, in source file ../libraries/megafunctions/altsyncram.tdf
    Info: Found entity 1: altsyncram
Info: Elaborating entity "altsyncram" for hierarchy "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component"
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_7mv.tdf
    Info: Found entity 1: altsyncram_7mv
Info: Elaborating entity "altsyncram_7mv" for hierarchy "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated"
Info: Found 1 design units, including 1 entities, in source file db/mux_gcb.tdf
    Info: Found entity 1: mux_gcb
Info: Elaborating entity "mux_gcb" for hierarchy "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|mux_gcb:mux2"
Warning: Reduced register "VgaInterface:u2|char_address[15]" with stuck data_in port to stuck value GND
Warning: Reduced register "VgaInterface:u2|char_address[14]" with stuck data_in port to stuck value GND
Warning: Reduced register "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|address_reg_a[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|address_reg_a[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|address_reg_a[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|address_reg_a[6]" with stuck data_in port to stuck value GND
Warning: Synthesized away the following node(s):
    Warning: Synthesized away the following RAM node(s):
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a4"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a5"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a6"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a7"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a8"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a9"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a10"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a11"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a12"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a13"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a14"
        Warning: Synthesized away node "VgaInterface:u2|vga:u1|altsyncram:altsyncram_component|altsyncram_7mv:auto_generated|ram_block1a15"
Info: Duplicate registers merged to single register
    Info: Duplicate register "VgaInterface:u2|vga_data[10]" merged to single register "VgaInterface:u2|vga_data[11]"
    Info: Duplicate register "VgaInterface:u2|vga_data[8]" merged to single register "VgaInterface:u2|vga_data[9]"
    Info: Duplicate register "VgaInterface:u2|vga_g" merged to single register "VgaInterface:u2|vga_r"
    Info: Duplicate register "VgaInterface:u2|vga_b" merged to single register "VgaInterface:u2|vga_r"
Info: Duplicate registers merged to single register
    Info: Duplicate register "VgaInterface:u2|vga_data[6]" merged to single register "VgaInterface:u2|vga_data[7]"
    Info: Duplicate register "VgaInterface:u2|vga_data[5]" merged to single register "VgaInterface:u2|vga_data[7]"
    Info: Duplicate register "VgaInterface:u2|pod_vga_g" merged to single register "VgaInterface:u2|pod_vga_r"
    Info: Duplicate register "VgaInterface:u2|pod_vga_b" merged to single register "VgaInterface:u2|pod_vga_r"
Info: State machine "|Ivga|cal:u1|STX" contains 5 states and 0 state bits
Info: Selected Auto state machine encoding method for state machine "|Ivga|cal:u1|STX"
Info: Encoding result for state machine "|Ivga|cal:u1|STX"
    Info: Completed encoding using 5 state bits
        Info: Encoded state bit "cal:u1|STX.st4"
        Info: Encoded state bit "cal:u1|STX.st3"
        Info: Encoded state bit "cal:u1|STX.st2"
        Info: Encoded state bit "cal:u1|STX.st1"
        Info: Encoded state bit "cal:u1|STX.st0"
    Info: State "|Ivga|cal:u1|STX.st0" uses code string "00000"
    Info: State "|Ivga|cal:u1|STX.st1" uses code string "00011"
    Info: State "|Ivga|cal:u1|STX.st2" uses code string "00101"
    Info: State "|Ivga|cal:u1|STX.st3" uses code string "01001"
    Info: State "|Ivga|cal:u1|STX.st4" uses code string "10001"
Info: Registers with preset signals will power-up high
Info: Implemented 186 device resources after synthesis - the final resource count might be different
    Info: Implemented 7 input pins
    Info: Implemented 5 output pins
    Info: Implemented 170 logic cells
    Info: Implemented 4 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 20 warnings
    Info: Processing ended: Thu May 11 13:23:40 2006
    Info: Elapsed time: 00:00:06