hdllib.ref

来自「数字计时器」· REF 代码 · 共 7 行

EN seg NULL E:/FPGA/Exp4-Clock/SEG.vhd sub00/vhpl00 1151044791
AR count10 behavioral E:/FPGA/Exp4-Clock/SEG.vhd sub00/vhpl05 1151044794
EN count6 NULL E:/FPGA/Exp4-Clock/SEG.vhd sub00/vhpl01 1151044795
EN count10 NULL E:/FPGA/Exp4-Clock/SEG.vhd sub00/vhpl04 1151044793
AR seg behavioral E:/FPGA/Exp4-Clock/SEG.vhd sub00/vhpl03 1151044792
AR count6 behavioral E:/FPGA/Exp4-Clock/SEG.vhd sub00/vhpl02 1151044796