ctrol_clk.asm

数字锁相环程序

.chip TM8706
.data
       org 30h
       addr_l equ 30h
       addr_h equ 31h
       data0  equ 32h
       data1  equ 33h
       data2  equ 34h
       data3  equ 35h
       freq0  equ 36h
       freq1  equ 37h
       sclk   equ 38h 
       buff0  equ 39h
       buff1  equ 3ah 
       buff2  equ 3bh
       buff3  equ 3ch
       buff4  equ 3dh
       buff5  equ 3eh
       buff6  equ 3fh
       comp   equ 40h
       stop_signal equ 41h
       strt_signal equ 42h
       disp0  equ 43h
       disp1  equ 44h
       disp2  equ 45h
       disp3  equ 46h
       dis_ad_flag equ 47h
       dis_d_flag  equ 48h
       f_back equ 49h
       key_signal  equ 4ah
       t_sec0      equ 4bh
       t_sec1      equ 50h   
       t_minute0   equ 4ch
       t_minute1   equ 4dh
       t_hour0     equ 4eh
       t_hour1     equ 4fh
       set_time0   equ 51h
       set_time1   equ 52h
       half_sec    equ 53h
       reg_ac      equ 54h 
       check_csf   equ 55h 
       reg_cf      equ 56h
       store_up_t  equ 57h
       draw_out_t  equ 58h
       memory0     equ 59h
       memory1     equ 5ah 
       memory2     equ 5bh
       mem_full    equ 5ch
       force_1     equ 5dh
       force_2     equ 5eh
       dis_time_f0 equ 5fh
       dis_time_f1 equ 60h 
       org 70h
       a_signal dn 1
       scan_tl  dn 1
       scan_th  dn 1   
.endd

.code
           org 00h
           rf 01h
           jmp start
           
           org 1ch
           sta reg_ac
           msd check_csf
           fast
           jmp second_add
           
           
         
start: 
           
           slow
           spc 11h
           spa 17h
           spb 1fh
           call clear_lcd
           plc 08h
           sie* 08h
                     
;**********************************
;******** data initial ************           
           lds addr_l,00h
           lds addr_h,0dh
        ;   lds data0,06h   
           lds freq0,06h
       	   lds freq1,05h
       	   lds force_1,01h
       	   lds force_2,02h 
       	   lds dis_d_flag,00h
       	   lds f_back,00h
       	   lds t_sec0,00h
           lds t_sec1,00h
           lds t_minute0,00h
           lds t_minute1,00h
           lds t_hour0,00h
           lds t_hour1,00h
           lds set_time0,00h
           lds set_time1,00h
           lds half_sec,00h
           lds store_up_t,00h
           lds draw_out_t,00h
           lds dis_time_f0,00h
           lds dis_time_f1,00h 
           lds memory0,00h
           lds memory1,08h
           lds memory2,00h 
           lds mem_full,00h
       	   lds a_signal,03h  ;07h -> 03h
           opa a_signal            
          ; eor a_signal
          ;lcp 00h,00h
           call clk_ini
           call up_data_ini
           call up_add_1
           call scan_add
           call latch_ram
           call data_clk
           call dis_ad  
           call display
           jmp  keyscan 
;***********************************           
clk_ini:                            ;1.83 ms  
           lds sclk,00h
           lds buff0,00h
           lds buff1,03h
           lds buff2,00h
           lds buff3,04h
           lds buff4,04h
           lds buff5,09h
           lds buff6,0ch   
           lds comp,01h 
           rts
latch_ram:           
           mvl force_2
           mvh buff1
           mvu addr_l
           lda @hl
           sta buff2 
           rts      
;*********************************
;********** data clk source ******            
data_clk:                          ;all delay=15.85ms
                          
          fast                     ;0.213ms
          lds a_signal,03h
          opa a_signal
          ;eor a_signal
          ;lcp 00h,00h
          call delay2
          lds a_signal,07h   ;**** 
;*********************************       
loop_c:                           ;14.78ms
      	  lda  sclk
      	  jb0  s_bit_1
      	  andi* 00h,05h
      	  opa   a_signal
      	  ;lcp  00h,00h
      	  call sdio_a
      	  call delay2
          jmp  sclk_1
s_bit_1:
       	  ori* 00h,02h
       	  opa  a_signal
       	  ;lcp  00h,00h
       	  call delay2
      	  inc* buff0
      	  jc comp_0
       	  nop
          nop
          nop
          jmp sclk_1
comp_0:
          rf 01h 
       	  sl0 comp
      	  jb1 stop_clk ;jb2 -> jb1
      	  nop
      	  call delay1        
sclk_1:
      	  inc* sclk
      	  jmp loop_c
      	  
stop_clk:                    ;0.854ms    
                    
      	  andi* 00h,01h
      	  opa  a_signal 
      	  ;lcp 00h,00h
      	  slow
      	  lds a_signal,03h
      	  nop
      	  opa a_signal 
      	  ;lcp 00h,00h
          rts
;***************************************          
;********** sdio data transfer *********                      
sdio_a:                                ;13.44us
       	  lda buff2
       	  jb0 sdio_0
       	  andi* 00h,06h
       	  opa  a_signal
       	  ;lcp 00h,00h
       	  jmp sdio_1
sdio_0:
       	  ori* 00h,01h
      	  opa  a_signal
      	  ;lcp 00h,00h
       	  nop
sdio_1:
      	  dec* buff3
       	  jz index_1
       	  sr0 buff2
      	  nop
      	  nop
      	  jmp sdio_end                         
index_1:
      	  lds buff3,04h
      	  lda# @hl
      	  lda @hl 
      	  sta buff2   
sdio_end:           
       
	      rts
;*********************************
comp_up_dis:
              lda scan_tl
              eor buff5
              jz comp_up0
              nop
              nop
              nop
              lds stop_signal,00h
              jmp comp_up_end 
comp_up0: 
              lda scan_th
              eor buff6
              jz comp_up1
              lds stop_signal,00h
              jmp comp_up_end    
comp_up1:
              lds stop_signal,01h
comp_up_end:	
              rts	      
;*********************************
;*********** add_1 ***************
up_add_1:                         ;1.1ms  
          addi* 01h,01h
          eor buff5
          jz scan_end0
          adci* 02h,00h
          nop
          nop
          jmp scan_end1 
scan_end0: 
          adci* 02h,00h
          eor buff6
          jz scan_end2
          jmp scan_end1   
scan_end2:
          lds stop_signal,01h
          lds strt_signal,00h
scan_end1:	
          rts      
;*********************************
;******** add_14 *****************
scan_add:                          ;1ms   
          lda buff4
          add* data0
          jnc carry0
          inc* data1
          jnc carry0
          inc* data2
          jnc carry0
          inc* data3
carry0:
          inc* data1
          jnc carry_end
          inc* data2
          jnc carry_end
          inc* data3
carry_end:    
          rts                                        
;*********************************
comp_dn_dis:
            lda scan_tl
            eor force_1
            jz comp_d2
            nop
            nop
            lds strt_signal,00h
            jmp comp_dend
comp_d2:
            lda scan_th
            jz comp_d3
            lds strt_signal,00h
            jmp comp_dend                    
comp_d3:
            lds strt_signal,01h
comp_dend:
            rts 
;*********************************
;*********** dec_1 ***************
dn_dec_1:                          ;0.854ms
           dec* scan_tl
           eor force_1
           jz carry_b2
           jc carry_bend
           dec* scan_th
           jmp carry_bend
carry_b2:
           addi 02h,00h
           jz carry_b3
           jmp carry_bend                    
carry_b3:
           lds strt_signal,01h
           lds stop_signal,00h
carry_bend:
           rts             
;*********************************
;*********** dec_14 **************
scan_dec:                         ;1ms
          lda buff4
          sub* data0
          jc carry_b0
          dec* data1
          jc carry_b0
          dec* data2
          jc carry_b0
          dec* data3
          
carry_b0:
          dec* data1
          jc carry_b1
          dec* data2
          jc carry_b1
          dec* data3
carry_b1:
          rts
;*********************************
clear_lcd:           
           lds 70h,00h
           lcp 01h,00h
           lcp 02h,00h
           lcp 03h,00h
           lcp 04h,00h
           lcp 05h,00h
           lcp 06h,00h
           rts                    
;********************************* 
keyscan:                          ;2.43ms                 
          spc 11h
          lds  dis_time_f0,00h
key0:
          call clk_ini
key1:
          lds key_signal,01h 
key2:
          opb  key_signal
          ;mrw 74h,key_signal
          ;lcp 07h,04h
          ipc 74h
          jb2 ioc1_keys
          jb1 ioc0_keys
          sl0 key_signal
          jb3 key1 
          jmp key2
;********************************
ioc0_keys:
          call delay4 
          lda key_signal
          jb0 time_key 
          jb1 up_keys
          jb2 dn_keys
          jmp key1
ioc1_keys:
          call delay4
          lda key_signal
          jb0 store_up
          jb1 draw_out 
          jmp key1                        
;********************************          
up_keys: 
          call comp_up_dis
          lds dis_ad_flag,00h
        ;  call delay4
          ipc 74h
          jb1 up_keys0
          call up_initial
        ;  call delay4
          jmp key0
up_keys0:
          call up_sequ
          jmp key0     
;********************************               
dn_keys:  
          call comp_dn_dis   
          lds dis_ad_flag,01h
         ; call delay4
          ipc 74h
          jb1 dn_keys0
          call dn_initial
         ; call delay4
          jmp key0
dn_keys0:  
          call dn_sequ
          jmp key0        

           
;*****************************************
up_data_ini:                              ;1.6ms
            lds data0,02h
            lds data1,0ah
            lds data2,04h
            lds data3,04h 
            lds disp0,00h
            lds disp1,08h
            lds disp2,08h
            lds disp3,00h 
            lds scan_tl,00h
            lds scan_th,00h
            lds dis_d_flag,00h
            lds stop_signal,00h
            rts          
;*****************************************
up_initial:
            lda stop_signal 
            jz  up0
            call up_data_ini
up0:
              
            call up_add_1
            call scan_add
            call latch_ram
            call data_clk
            call dis_ad  
            call display
            rts
;******************************************
up_sequ: 
            lda stop_signal
            jz up_sequ0
            call up_data_ini
up_sequ0:                        ;15.85+15.5ms
            call up_add_1
            call scan_add
            call latch_ram
            call data_clk
            call delay3
            call dis_ad
            call display
            call latch_d
            lda f_back
            jnz dn_stop
            lda stop_signal
            jnz up_stop
            call clk_ini
            call delay6
            jmp up_sequ0
up_stop:
            
            rts                  
;******************************************
dn_data_ini:                              ;1.6ms
            lds data0,0ah
            lds data1,06h
            lds data2,04h
            lds data3,05h
            lds disp0,00h
            lds disp1,08h
            lds disp2,00h
            lds disp3,01h  
            lds dis_d_flag,00h 
            lds scan_tl,0ah
            lds scan_th,0ch                         
            lds strt_signal,00h
            rts                                        
;******************************************
dn_initial:
            lda strt_signal
            jz  dn0
            call dn_data_ini
dn0:     
            call dn_dec_1
            call scan_dec
            call latch_ram
            call data_clk
            call dis_ad 
            call display
            rts
;*****************************************
dn_sequ: 
            lda strt_signal
            jz dn_sequ0
            call dn_data_ini
dn_sequ0:                                   ;15.85+14.42ms
            call dn_dec_1
            call scan_dec
            call latch_ram
            call data_clk
            call delay3
            call dis_ad
            call display
            call latch_d
            lda f_back
            jnz dn_stop
            lda strt_signal
            jnz dn_stop
            call delay6
            call clk_ini
            jmp dn_sequ0
dn_stop:
            rts
;*****************************************
store_up:
            inc* store_up_t
            sta 75h
            call select_num
            mvl memory0
            mvh memory1
            mvu memory2