vga_test1_ucf.ucf

在显示器上显示汉字,在FPGA上实现,使用Verilog HDL 设计,完全可是直接使用

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// *  RICHIC CONFIDENTIAL PROPRIETARY NOTE                                     *
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// *  RicHic Inc.It shall not be reproduced in whole or in part or transferred *
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// *  written consent of RicHic Inc.                                           *
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// (C) 2004 [e-mail];     [e-mail]
//     http://www.richic.com
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NET "clk"       LOC = "p77";
NET "rst_n"     LOC = "p80";

NET "vga_hsync" LOC = "P3";
NET "vga_vsync" LOC = "P4";
NET "vga_red0" LOC = "P9";
NET "vga_red1" LOC = "P10";
NET "vga_blue0" LOC = "p5";
NET "vga_blue1" LOC = "P6";
NET "vga_green0" LOC = "P7";
NET "vga_green1" LOC = "P8";