sin.rpt

dds信号发生器

|divide:4|lpm_add_sub:895|
|divide:4|lpm_add_sub:895|addcore:adder|
|divide:4|lpm_add_sub:895|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:895|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:895|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:941|
|divide:4|lpm_add_sub:941|addcore:adder|
|divide:4|lpm_add_sub:941|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:941|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:941|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:987|
|divide:4|lpm_add_sub:987|addcore:adder|
|divide:4|lpm_add_sub:987|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:987|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:987|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1033|
|divide:4|lpm_add_sub:1033|addcore:adder|
|divide:4|lpm_add_sub:1033|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1033|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1033|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1079|
|divide:4|lpm_add_sub:1079|addcore:adder|
|divide:4|lpm_add_sub:1079|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1079|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1079|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1125|
|divide:4|lpm_add_sub:1125|addcore:adder|
|divide:4|lpm_add_sub:1125|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1125|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1125|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1171|
|divide:4|lpm_add_sub:1171|addcore:adder|
|divide:4|lpm_add_sub:1171|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1171|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1171|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1217|
|divide:4|lpm_add_sub:1217|addcore:adder|
|divide:4|lpm_add_sub:1217|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1217|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1217|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1263|
|divide:4|lpm_add_sub:1263|addcore:adder|
|divide:4|lpm_add_sub:1263|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1263|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1263|altshift:oflow_ext_latency_ffs|
|divide:4|lpm_add_sub:1309|
|divide:4|lpm_add_sub:1309|addcore:adder|
|divide:4|lpm_add_sub:1309|altshift:result_ext_latency_ffs|
|divide:4|lpm_add_sub:1309|altshift:carry_ext_latency_ffs|
|divide:4|lpm_add_sub:1309|altshift:oflow_ext_latency_ffs|
|adder6b:23|
|adder6b:23|lpm_add_sub:19|
|adder6b:23|lpm_add_sub:19|addcore:adder|
|adder6b:23|lpm_add_sub:19|altshift:result_ext_latency_ffs|
|adder6b:23|lpm_add_sub:19|altshift:carry_ext_latency_ffs|
|adder6b:23|lpm_add_sub:19|altshift:oflow_ext_latency_ffs|
|reg6b:24|
|sinrom1:25|
|sinrom1:25|lpm_rom:4|
|sinrom1:25|lpm_rom:4|altrom:srom|
|adder26b:37|
|adder26b:37|lpm_add_sub:91|
|adder26b:37|lpm_add_sub:91|addcore:adder|
|adder26b:37|lpm_add_sub:91|altshift:result_ext_latency_ffs|
|adder26b:37|lpm_add_sub:91|altshift:carry_ext_latency_ffs|
|adder26b:37|lpm_add_sub:91|altshift:oflow_ext_latency_ffs|
|reg26b:38|
|zhi:40|
|mzh:41|
|nzhi:42|
|f26b:43|
|fshow:47|
|fshow:47|lpm_add_sub:189|
|fshow:47|lpm_add_sub:189|addcore:adder|
|fshow:47|lpm_add_sub:189|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:189|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:189|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:246|
|fshow:47|lpm_add_sub:246|addcore:adder|
|fshow:47|lpm_add_sub:246|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:246|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:246|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:261|
|fshow:47|lpm_add_sub:261|addcore:adder|
|fshow:47|lpm_add_sub:261|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:261|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:261|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:584|
|fshow:47|lpm_add_sub:584|addcore:adder|
|fshow:47|lpm_add_sub:584|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:584|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:584|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:641|
|fshow:47|lpm_add_sub:641|addcore:adder|
|fshow:47|lpm_add_sub:641|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:641|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:641|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:656|
|fshow:47|lpm_add_sub:656|addcore:adder|
|fshow:47|lpm_add_sub:656|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:656|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:656|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:979|
|fshow:47|lpm_add_sub:979|addcore:adder|
|fshow:47|lpm_add_sub:979|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:979|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:979|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:1036|
|fshow:47|lpm_add_sub:1036|addcore:adder|
|fshow:47|lpm_add_sub:1036|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:1036|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:1036|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:1051|
|fshow:47|lpm_add_sub:1051|addcore:adder|
|fshow:47|lpm_add_sub:1051|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:1051|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:1051|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:1374|
|fshow:47|lpm_add_sub:1374|addcore:adder|
|fshow:47|lpm_add_sub:1374|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:1374|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:1374|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:1431|
|fshow:47|lpm_add_sub:1431|addcore:adder|
|fshow:47|lpm_add_sub:1431|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:1431|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:1431|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:1446|
|fshow:47|lpm_add_sub:1446|addcore:adder|
|fshow:47|lpm_add_sub:1446|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:1446|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:1446|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:2573|
|fshow:47|lpm_add_sub:2573|addcore:adder|
|fshow:47|lpm_add_sub:2573|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:2573|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:2573|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:2574|
|fshow:47|lpm_add_sub:2574|addcore:adder|
|fshow:47|lpm_add_sub:2574|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:2574|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:2574|altshift:oflow_ext_latency_ffs|
|fshow:47|lpm_add_sub:2575|
|fshow:47|lpm_add_sub:2575|addcore:adder|
|fshow:47|lpm_add_sub:2575|altshift:result_ext_latency_ffs|
|fshow:47|lpm_add_sub:2575|altshift:carry_ext_latency_ffs|
|fshow:47|lpm_add_sub:2575|altshift:oflow_ext_latency_ffs|


Device-Specific Information:                                    f:\sin\sin.rpt
sin

***** Logic for device 'sin' compiled without errors.




Device: EPF10K20TC144-4

FLEX 10K Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    JTAG User Code                             = 7f
    MultiVolt I/O                              = OFF

                                                                                         
                                                                                         
                R R R R R   R R R R   R R R R   R           R R R R   R     R R          
                E E E E E   E E E E   E E E E   E           E E E E   E     E E          
                S S S S S   S S S S   S S S S   S G       V S S S S   S     S S          
                E E E E E G E E E E V E E E E G E N       C E E E E   E   V E E          
                R R R R R N R R R R C R R R R N R D q c c C R R R R p R   C R R p   p    
                V V V V V D V V V V C V V V V D V I 1 l l I V V V V 6 V f C V V 6 f 6    
                E E E E E I E E E E I E E E E I E N i k k N E E E E b E 1 I E E b 1 b f  
                D D D D D O D D D D O D D D D O D T n 2 1 T D D D D 5 D 5 O D D 4 4 3 1  
              --------------------------------------------------------------------------_ 
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