📄 traffic.rpt
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_LC5_B9 = DFFE( _EQ008, GLOBAL( clk), VCC, VCC, VCC);
_EQ008 = _LC1_B9 & !_LC4_B9 & _LC5_B9
# _LC1_B9 & !_LC2_B9 & _LC5_B9
# _LC1_B9 & _LC2_B9 & _LC4_B9 & !_LC5_B9;
-- Node name is '|COUNT26:2|LPM_ADD_SUB:56|addcore:adder|:67' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC2_B9', type is buried
_LC2_B9 = LCELL( _EQ009);
_EQ009 = _LC5_B2 & _LC6_B9 & _LC7_B9;
-- Node name is '|COUNT26:2|~22~1'
-- Equation name is '_LC3_B9', type is buried
-- synthesized logic cell
_LC3_B9 = LCELL( _EQ010);
_EQ010 = !_LC4_B9
# !_LC5_B9;
-- Node name is '|COUNT26:2|:44'
-- Equation name is '_LC1_B9', type is buried
_LC1_B9 = LCELL( _EQ011);
_EQ011 = _LC2_B2 & _LC3_B9
# _LC2_B2 & !_LC6_B9 & !_LC7_B9;
-- Node name is '|COUNT26:2|~103~1'
-- Equation name is '_LC8_B9', type is buried
-- synthesized logic cell
!_LC8_B9 = _LC8_B9~NOT;
_LC8_B9~NOT = LCELL( _EQ012);
_EQ012 = !_LC4_B9
# !_LC5_B9
# _LC6_B9
# !_LC7_B9;
-- Node name is '|COUNT30:4|:8' = '|COUNT30:4|cnt0'
-- Equation name is '_LC1_B12', type is buried
_LC1_B12 = DFFE( _EQ013, GLOBAL( clk), VCC, VCC, VCC);
_EQ013 = !_LC1_B12 & _LC2_B12 & !_LC4_B2;
-- Node name is '|COUNT30:4|:7' = '|COUNT30:4|cnt1'
-- Equation name is '_LC3_B12', type is buried
_LC3_B12 = DFFE( _EQ014, GLOBAL( clk), VCC, VCC, VCC);
_EQ014 = _LC1_B12 & _LC2_B12 & !_LC3_B12 & !_LC4_B2
# !_LC1_B12 & _LC2_B12 & _LC3_B12 & !_LC4_B2;
-- Node name is '|COUNT30:4|:6' = '|COUNT30:4|cnt2'
-- Equation name is '_LC5_B12', type is buried
_LC5_B12 = DFFE( _EQ015, GLOBAL( clk), VCC, VCC, VCC);
_EQ015 = !_LC1_B12 & _LC4_B12 & _LC5_B12
# !_LC3_B12 & _LC4_B12 & _LC5_B12
# _LC1_B12 & _LC3_B12 & _LC4_B12 & !_LC5_B12;
-- Node name is '|COUNT30:4|:5' = '|COUNT30:4|cnt3'
-- Equation name is '_LC7_B12', type is buried
_LC7_B12 = DFFE( _EQ016, GLOBAL( clk), VCC, VCC, VCC);
_EQ016 = _LC4_B12 & !_LC6_B12 & _LC7_B12
# _LC4_B12 & _LC6_B12 & !_LC7_B12;
-- Node name is '|COUNT30:4|:4' = '|COUNT30:4|cnt4'
-- Equation name is '_LC8_B12', type is buried
_LC8_B12 = DFFE( _EQ017, GLOBAL( clk), VCC, VCC, VCC);
_EQ017 = _LC4_B12 & !_LC7_B12 & _LC8_B12
# _LC4_B12 & !_LC6_B12 & _LC8_B12
# _LC4_B12 & _LC6_B12 & _LC7_B12 & !_LC8_B12;
-- Node name is '|COUNT30:4|LPM_ADD_SUB:56|addcore:adder|:67' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC6_B12', type is buried
_LC6_B12 = LCELL( _EQ018);
_EQ018 = _LC1_B12 & _LC3_B12 & _LC5_B12;
-- Node name is '|COUNT30:4|:22'
-- Equation name is '_LC2_B12', type is buried
_LC2_B12 = LCELL( _EQ019);
_EQ019 = !_LC3_B12
# !_LC5_B12
# !_LC7_B12
# !_LC8_B12;
-- Node name is '|COUNT30:4|:44'
-- Equation name is '_LC4_B12', type is buried
_LC4_B12 = LCELL( _EQ020);
_EQ020 = _LC2_B12 & !_LC4_B2;
-- Node name is '|TRAFFIC_CONTROL:1|state~1'
-- Equation name is '_LC6_B2', type is buried
_LC6_B2 = DFFE( _EQ021, GLOBAL( clk), !reset, VCC, VCC);
_EQ021 = _LC5_B7
# _LC2_B2 & !_LC5_B2 & _LC8_B9;
-- Node name is '|TRAFFIC_CONTROL:1|state~2'
-- Equation name is '_LC2_B2', type is buried
_LC2_B2 = DFFE( _EQ022, GLOBAL( clk), !reset, VCC, VCC);
_EQ022 = _LC8_B7
# _LC2_B2 & !_LC8_B9
# _LC2_B2 & _LC5_B2;
-- Node name is '|TRAFFIC_CONTROL:1|state~3'
-- Equation name is '_LC3_B2', type is buried
_LC3_B2 = DFFE( _EQ023, GLOBAL( clk), !reset, VCC, VCC);
_EQ023 = _LC4_B7
# !_LC1_B12 & !_LC2_B12 & !_LC4_B2;
-- Node name is '|TRAFFIC_CONTROL:1|state~4'
-- Equation name is '_LC4_B2', type is buried
_LC4_B2 = DFFE( _EQ024, GLOBAL( clk), !reset, VCC, VCC);
_EQ024 = _LC4_B2 & !_LC6_B7
# !_LC1_B12 & !_LC2_B12 & !_LC6_B7;
-- Node name is '|TRAFFIC_CONTROL:1|:88'
-- Equation name is '_LC4_B7', type is buried
_LC4_B7 = LCELL( _EQ025);
_EQ025 = _LC3_B2 & _LC3_B7
# !_LC2_B7 & _LC3_B2
# _LC3_B2 & !_LC7_B7;
-- Node name is '|TRAFFIC_CONTROL:1|:90'
-- Equation name is '_LC8_B7', type is buried
_LC8_B7 = LCELL( _EQ026);
_EQ026 = _LC2_B7 & _LC3_B2 & !_LC3_B7 & _LC7_B7;
-- Node name is '|TRAFFIC_CONTROL:1|:96'
-- Equation name is '_LC6_B7', type is buried
!_LC6_B7 = _LC6_B7~NOT;
_LC6_B7~NOT = LCELL( _EQ027);
_EQ027 = !_LC6_B2
# _LC3_B7
# !_LC2_B7
# !_LC7_B7;
-- Node name is '|TRAFFIC_CONTROL:1|:98'
-- Equation name is '_LC5_B7', type is buried
_LC5_B7 = LCELL( _EQ028);
_EQ028 = _LC3_B7 & _LC6_B2
# !_LC2_B7 & _LC6_B2
# _LC6_B2 & !_LC7_B7;
-- Node name is '|TRAFFIC_CONTROL:1|:142'
-- Equation name is '_LC1_B7', type is buried
_LC1_B7 = LCELL( _EQ029);
_EQ029 = _LC6_B2
# _LC3_B2;
-- Node name is '|TRAFFIC_CONTROL:1|:174'
-- Equation name is '_LC8_B2', type is buried
_LC8_B2 = LCELL( _EQ030);
_EQ030 = _LC3_B2
# !_LC4_B2;
-- Node name is '|TRAFFIC_CONTROL:1|:220'
-- Equation name is '_LC1_B2', type is buried
_LC1_B2 = LCELL( _EQ031);
_EQ031 = _LC6_B2
# _LC2_B2;
Project Information d:\project\traffic.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'FLEX10K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
Logic Synthesizer 00:00:00
Partitioner 00:00:00
Fitter 00:00:02
Timing SNF Extractor 00:00:00
Assembler 00:00:01
-------------------------- --------
Total Time 00:00:03
Memory Allocated
-----------------
Peak memory allocated during compilation = 15,256K
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