📄 bahe.tan.rpt
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Timing Analyzer report for bahe
Mon May 22 23:53:55 2006
Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Web Edition
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; Table of Contents ;
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1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. Clock Settings Summary
5. Clock Setup: 'clk_4m'
6. Clock Hold: 'clk_4m'
7. tsu
8. tco
9. th
10. Timing Analyzer Messages
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; Legal Notice ;
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Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+------------------------------------------+---------------+----------------------------------+--------------------------------------------------------------------+-------------------------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+------------------------------------------+---------------+----------------------------------+--------------------------------------------------------------------+-------------------------+------------+----------+--------------+
; Worst-case tsu ; N/A ; None ; 8.200 ns ; man_right ; qp[2] ; -- ; clk_4m ; 0 ;
; Worst-case tco ; N/A ; None ; 31.300 ns ; counter:u5|lpm_counter:Q_rtl_1|alt_counter_f10ke:wysi_counter|q[1] ; seg[6] ; clk_4m ; -- ; 0 ;
; Worst-case th ; N/A ; None ; 1.000 ns ; man_right ; Debunce:u2|\Debounce:D0 ; -- ; clk_4m ; 0 ;
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