fujieqiall.hif

用FPGA实现数字复接?肍PGA实现数字复接

Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Web Edition
17
2006
OFF
OFF
OFF
OFF
OFF
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
# entity
fujieqiall
# storage
db|fujieqiall.(0).cnf
db|fujieqiall.(0).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fujieqiall.vhd
5eb7ca91a740d4e64dbc841659d8a3b
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
|
}
# end
# entity
neimacs0
# storage
db|fujieqiall.(1).cnf
db|fujieqiall.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
neimacs0.vhd
185ef1693c735f2b8f8fd68edc38e96d
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
neimacs0:m1
neimacs0:m2
neimacs0:m3
neimacs0:m4
}
# end
# entity
mux_8
# storage
db|fujieqiall.(2).cnf
db|fujieqiall.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
mux_8.vhd
a91949200e33959ebb8d81d34f5bf7e
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
neimacs0:m1|mux_8:u1
neimacs0:m2|mux_8:u1
neimacs0:m3|mux_8:u1
neimacs0:m4|mux_8:u1
}
# end
# entity
tri_gate0
# storage
db|fujieqiall.(3).cnf
db|fujieqiall.(3).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
tri_gate0.vhd
103bdce5a01c873c50dc745e36644717
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
neimacs0:m1|tri_gate0:u2
neimacs0:m2|tri_gate0:u2
neimacs0:m3|tri_gate0:u2
neimacs0:m4|tri_gate0:u2
}
# end
# entity
shixusuccessful
# storage
db|fujieqiall.(4).cnf
db|fujieqiall.(4).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
shixusuccessful.vhd
1be3342ef27f734517b45ce9c1124031
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
shixusuccessful:m5
}
# end
# entity
nand0_1
# storage
db|fujieqiall.(5).cnf
db|fujieqiall.(5).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
nand0_1.vhd
5335266917cd53ed5e11f782dea77d8
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
shixusuccessful:m5|nand0_1:u1
shixusuccessful:m5|nand0_1:u4
shixusuccessful:m5|nand0_1:u5
shixusuccessful:m5|nand0_1:u6
shixusuccessful:m5|nand0_1:u7
}
# end
# entity
count32
# storage
db|fujieqiall.(6).cnf
db|fujieqiall.(6).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
count32.vhd
a69d4ec288b764de921947a62dd75
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
shixusuccessful:m5|count32:u2
}
# end
# entity
yimaqi
# storage
db|fujieqiall.(7).cnf
db|fujieqiall.(7).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
yimaqi.vhd
3b82b3c8ef5c9d9b6d4bc72e594e48d7
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
shixusuccessful:m5|yimaqi:u3
}
# end
# entity
count16
# storage
db|fujieqiall.(8).cnf
db|fujieqiall.(8).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
count16.vhd
e772a35d8ab33270e2c3941f3b6b95b
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
count16:m6
}
# end
# entity
men
# storage
db|fujieqiall.(9).cnf
db|fujieqiall.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
men.vhd
2e633577d9d27d8241c61242bfcc8a
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
men:m7
men:m8
men:m9
men:m10
}
# end
# entity
andmen
# storage
db|fujieqiall.(10).cnf
db|fujieqiall.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
andmen.vhd
311b633abe1fdeeab8220fe36c34ce
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
andmen:m11
}
# end
# entity
djhlatch
# storage
db|fujieqiall.(11).cnf
db|fujieqiall.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
djhlatch.vhd
a353779e7eabed1e73a032af623e5d
4
# internal_option {
ADD_PASS_THROUGH_LOGIC_TO_INFERRED_RAMS
ON
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
djhlatch:m12
}
# end
# entity
lpm_counter
# storage
db|fujieqiall.(12).cnf
db|fujieqiall.(12).cnf
# case_insensitive
# source_file
d:|altera|quartus51sp2|libraries|megafunctions|lpm_counter.tdf
a52725e432c6afb55468eb62553a3d9e
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
5
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
FLEX10K
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
}
# used_port {
q4
-1
3
q3
-1
3
clock
-1
3
}
# include_file {
d:|altera|quartus51sp2|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
d:|altera|quartus51sp2|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|altera|quartus51sp2|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
d:|altera|quartus51sp2|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
d:|altera|quartus51sp2|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
d:|altera|quartus51sp2|libraries|megafunctions|lpm_counter.inc
758886b0947dd67e65ec58adda9b948
d:|altera|quartus51sp2|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
d:|altera|quartus51sp2|libraries|megafunctions|alt_synch_counter.inc
e64d362a7450ad9895aa7e1e5dc2b42a
d:|altera|quartus51sp2|libraries|megafunctions|alt_synch_counter_f.inc
88e2e3ac71decf106c8d913bf441832f
d:|altera|quartus51sp2|libraries|megafunctions|alt_counter_f10ke.inc
d8a92a43831e9df2804dcf9a927e20
d:|altera|quartus51sp2|libraries|megafunctions|alt_counter_stratix.inc
587bf41cd15486161ec3eb5a1fef4c2
d:|altera|quartus51sp2|libraries|megafunctions|aglobal51.inc
c49d61e8168d42962ec885e3e17640c2
}
# end
# entity
alt_counter_f10ke
# storage
db|fujieqiall.(13).cnf
db|fujieqiall.(13).cnf
# case_insensitive
# source_file
d:|altera|quartus51sp2|libraries|megafunctions|alt_counter_f10ke.tdf
185629c1c9217b8eedf38296709cc0
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
5
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
USR
LPM_SVALUE
31
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
31
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
FLEX10K
PARAMETER_UNKNOWN
USR
}
# used_port {
q4
-1
3
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cout
-1
3
clock
-1
3
}
# include_file {
d:|altera|quartus51sp2|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
d:|altera|quartus51sp2|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
d:|altera|quartus51sp2|libraries|megafunctions|aglobal51.inc
c49d61e8168d42962ec885e3e17640c2
d:|altera|quartus51sp2|libraries|megafunctions|flex10ke_lcell.inc
c89a3d47968155565cd6d7fab3ae6a
}
# end
# entity
lpm_counter
# storage
db|fujieqiall.(14).cnf
db|fujieqiall.(14).cnf
# case_insensitive
# source_file
d:|altera|quartus51sp2|libraries|megafunctions|lpm_counter.tdf
a52725e432c6afb55468eb62553a3d9e
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_SVALUE
UNUSED
PARAMETER_UNKNOWN
DEF
LPM_PORT_UPDOWN
PORT_CONNECTIVITY
PARAMETER_UNKNOWN
DEF
DEVICE_FAMILY
FLEX10K
PARAMETER_UNKNOWN
USR
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
NOT_GATE_PUSH_BACK
ON
NOT_GATE_PUSH_BACK
USR
CARRY_CNT_EN
SMART
PARAMETER_UNKNOWN
DEF
LABWIDE_SCLR
ON
PARAMETER_UNKNOWN
DEF
USE_NEW_VERSION
TRUE
PARAMETER_UNKNOWN
DEF
CBXI_PARAMETER
NOTHING
PARAMETER_UNKNOWN
DEF
}
# used_port {
q2
-1
3
q1
-1
3
q0
-1
3
clock
-1
3
}
# include_file {
d:|altera|quartus51sp2|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
d:|altera|quartus51sp2|libraries|megafunctions|lpm_decode.inc
bd0e2f5e01c1bd360461dceb53d48
d:|altera|quartus51sp2|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
d:|altera|quartus51sp2|libraries|megafunctions|cmpconst.inc
e61874547688138e6fc0b49ff8760
d:|altera|quartus51sp2|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
d:|altera|quartus51sp2|libraries|megafunctions|lpm_counter.inc
758886b0947dd67e65ec58adda9b948
d:|altera|quartus51sp2|libraries|megafunctions|dffeea.inc
55d29d20f7e852c37746bec4e2495ec
d:|altera|quartus51sp2|libraries|megafunctions|alt_synch_counter.inc
e64d362a7450ad9895aa7e1e5dc2b42a
d:|altera|quartus51sp2|libraries|megafunctions|alt_synch_counter_f.inc
88e2e3ac71decf106c8d913bf441832f
d:|altera|quartus51sp2|libraries|megafunctions|alt_counter_f10ke.inc
d8a92a43831e9df2804dcf9a927e20
d:|altera|quartus51sp2|libraries|megafunctions|alt_counter_stratix.inc
587bf41cd15486161ec3eb5a1fef4c2
d:|altera|quartus51sp2|libraries|megafunctions|aglobal51.inc
c49d61e8168d42962ec885e3e17640c2
}
# end
# entity
alt_counter_f10ke
# storage
db|fujieqiall.(15).cnf
db|fujieqiall.(15).cnf
# case_insensitive
# source_file
d:|altera|quartus51sp2|libraries|megafunctions|alt_counter_f10ke.tdf
185629c1c9217b8eedf38296709cc0
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
4
PARAMETER_UNKNOWN
USR
LPM_DIRECTION
UP
PARAMETER_UNKNOWN
USR
LPM_MODULUS
0
PARAMETER_UNKNOWN
USR
LPM_SVALUE
15
PARAMETER_UNKNOWN
DEF
LPM_AVALUE
15
PARAMETER_UNKNOWN
DEF
CARRY_CHAIN
MANUAL
PARAMETER_UNKNOWN
USR
CASCADE_CHAIN_LENGTH
2
CASCADE_CHAIN_LENGTH
USR
CARRY_CHAIN_LENGTH
48
CARRY_CHAIN_LENGTH
USR
DEVICE_FAMILY
FLEX10K
PARAMETER_UNKNOWN
USR
}
# used_port {
q3
-1
3
q2
-1
3
q1
-1
3
q0
-1
3
cout
-1
3
clock
-1
3
}
# include_file {
d:|altera|quartus51sp2|libraries|megafunctions|lpm_constant.inc
dcde44eee59335c1e2fe75d574f9646
d:|altera|quartus51sp2|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
d:|altera|quartus51sp2|libraries|megafunctions|aglobal51.inc
c49d61e8168d42962ec885e3e17640c2
d:|altera|quartus51sp2|libraries|megafunctions|flex10ke_lcell.inc
c89a3d47968155565cd6d7fab3ae6a
}
# end
# complete