📄 fujieqiall.fit.talkback.xml

📁 用FPGA实现数字复接?肍PGA实现数字复接
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上一页 12
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>a6</name>
		<pin__>39</pin__>
		<col.>11</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>a7</name>
		<pin__>81</pin__>
		<col.>22</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>a4</name>
		<pin__>49</pin__>
		<col.>16</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b2</name>
		<pin__>35</pin__>
		<col.>6</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b1</name>
		<pin__>11</pin__>
		<col.>1</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b3</name>
		<pin__>69</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b0</name>
		<pin__>3</pin__>
		<col.>12</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b5</name>
		<pin__>37</pin__>
		<col.>9</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b6</name>
		<pin__>16</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b7</name>
		<pin__>5</pin__>
		<col.>5</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>b4</name>
		<pin__>8</pin__>
		<col.>3</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d2</name>
		<pin__>51</pin__>
		<col.>18</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d1</name>
		<pin__>72</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d3</name>
		<pin__>71</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d0</name>
		<pin__>78</pin__>
		<col.>24</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d5</name>
		<pin__>17</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d6</name>
		<pin__>70</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d7</name>
		<pin__>18</pin__>
		<row>A</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>d4</name>
		<pin__>10</pin__>
		<col.>1</col.>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>ena</name>
		<pin__>24</pin__>
		<row>B</row>
		<fan_out>1</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
</input_pins>
<output_pins>
	<row>
		<name>S3</name>
		<pin__>36</pin__>
		<col.>7</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>S2</name>
		<pin__>30</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>S1</name>
		<pin__>7</pin__>
		<col.>3</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>S0</name>
		<pin__>25</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>fujieout</name>
		<pin__>23</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
</output_pins>
<files>
	<top>F:/EDA/fujieqiall/fujieqiall.vhd</top>
	<extensions>
		<ext ext_name="vhd">13</ext>
		<ext ext_name="tdf">2</ext>
		<ext ext_name="inc">13</ext>
		<ext ext_name="lst">1</ext>
	</extensions>
	<sub_files>
		<sub_file>F:/EDA/fujieqiall/andmen.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/count16.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/count32.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/djhlatch.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/fujieqiall.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/men.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/mux_8.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/nand0_1.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/neimacs0.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/shixusuccessful.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/tri_gate0.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/tri_gate1.vhd</sub_file>
		<sub_file>F:/EDA/fujieqiall/yimaqi.vhd</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/lpm_counter.tdf</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/lpm_constant.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/lpm_decode.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/lpm_add_sub.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/cmpconst.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/lpm_compare.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/lpm_counter.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/dffeea.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/alt_synch_counter.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/alt_synch_counter_f.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/alt_counter_f10ke.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/alt_counter_stratix.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/aglobal51.inc</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/cbx.lst</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/alt_counter_f10ke.tdf</sub_file>
		<sub_file>d:/altera/quartus51sp2/libraries/megafunctions/flex10ke_lcell.inc</sub_file>
	</sub_files>
</files>
<architecture>
	<family>FLEX10K</family>
	<auto_device>ON</auto_device>
	<device>EPF10K10LC84-3</device>
</architecture>
<pkg_io>
	<pin_std count="39">TTL</pin_std>
</pkg_io>
</talkback>
上一页 12
💿 文件大小 203 K
👤 上传用户 sea_and_sun
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#FPGA #PGA #数字复接
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