📄 frequ_er.vhd
字号:
led_display_cont, led_display_scale : OUT std_logic_vector(4 downto 0));
END display ;
ARCHITECTURE beha_led OF display IS
COMPONENT scan IS
PORT ( CLKL : IN STD_LOGIC;
POINT,EXTINGGUISH : IN STD_LOGIC;
DATA : IN INTEGER RANGE 0 TO 15 ;
DISPLAY_R : OUT STD_LOGIC_VECTOR(4 DOWNTO 0) ;
SCAN_L : OUT STD_LOGIC_VECTOR(1 DOWNTO 0) );
END COMPONENT ;
SIGNAL led_cont4_t,led_cont3_t,led_cont2_t,led_cont1_t : integer RANGE 0 TO 9 ;
SIGNAL led_data_scale,led_data_cont: integer RANGE 0 TO 15 ;
SIGNAL led_scale_t : integer RANGE 0 TO 3 ;
SIGNAL sel_led_line32_t,sel_led_line10_t1,sel_led_line10_t2: std_logic_vector(1 downto 0);
SIGNAL extingguish_scale,extingguish_cont,gnd : std_logic ;
BEGIN
gnd <= '0' ;
u_cont : scan PORT MAP
(clk_8kh, gnd, extingguish_cont, led_data_cont, led_display_cont, sel_led_line10_t1);
u_scale : scan PORT MAP
(clk_8kh, gnd, extingguish_scale, led_data_scale, led_display_scale, sel_led_line10_t2);
sel_led_line10 <= sel_led_line10_t2 ;
PROCESS(measure_end)
BEGIN
IF falling_edge(measure_end) THEN
led_scale_t <= sel_scale;
led_cont1_t <= ex_cont1 ;
led_cont2_t <= ex_cont2 ;
led_cont3_t <= ex_cont3 ;
led_cont4_t <= ex_cont4 ;
END IF;
END process ;
PROCESS(display,sel_led_line32_t,led_cont4_t,led_cont3_t,led_cont2_t,led_cont1_t)
BEGIN
IF display = '0' THEN
extingguish_cont <= '1' ;
ELSE
CASE sel_led_line32_t IS
WHEN "00" => led_data_cont <= led_cont4_t ;
IF led_cont4_t = 0 THEN
extingguish_cont <= '1' ;
ELSE
extingguish_cont <= '0' ;
END IF ;
WHEN "01" => led_data_cont <= led_cont3_t ;
IF (led_cont4_t = 0 AND led_cont3_t = 0) THEN
extingguish_cont <= '1' ;
ELSE
extingguish_cont <= '0' ;
END IF ;
WHEN "10" => led_data_cont <= led_cont2_t ;
IF (led_cont4_t = 0 AND led_cont3_t = 0 AND led_cont2_t = 0) THEN
extingguish_cont <= '1' ;
ELSE
extingguish_cont <= '0' ;
END IF ;
WHEN "11" => led_data_cont <= led_cont1_t ;
extingguish_cont <= '0' ;
WHEN OTHERS => extingguish_cont <= '1' ;
END CASE ;
END IF ;
END PROCESS ;
PROCESS(display,sel_led_line32_t,led_scale_t)
BEGIN
IF display = '0' THEN
extingguish_scale <= '1' ;
ELSE
CASE sel_led_line32_t IS
WHEN "00" =>
CASE led_scale_t IS
WHEN 0 | 3 => led_data_scale <= 1 ;
extingguish_scale <= '0' ;
WHEN 1 => led_data_scale <= 9 ;
extingguish_scale <= '0' ;
WHEN 2 => extingguish_scale <= '1' ;
WHEN OTHERS => extingguish_scale <= '1' ;
END CASE;
WHEN "01" =>
CASE led_scale_t IS
WHEN 0 | 3 => led_data_scale <= 0 ;
extingguish_scale <= '0' ;
WHEN 1 => led_data_scale <= 9 ;
extingguish_scale <= '0' ;
WHEN 2 => led_data_scale <= 1 ;
extingguish_scale <= '0' ;
WHEN OTHERS => extingguish_scale <= '1' ;
END CASE;
WHEN "10" =>
CASE led_scale_t IS
WHEN 0 | 1 => led_data_scale <= 13 ;
extingguish_scale <= '0' ;
WHEN 2 | 3 => led_data_scale <= 14 ;
extingguish_scale <= '0' ;
WHEN OTHERS => extingguish_scale <= '1' ;
END CASE;
WHEN "11" => led_data_scale <= 12 ;
extingguish_scale <= '0' ;
WHEN OTHERS => extingguish_scale <= '1' ;
END CASE ;
END IF ;
END PROCESS ;
PROCESS (clk_1kh)
BEGIN
IF rising_edge(clk_1kh) THEN
IF sel_led_line32_t = "11" THEN
sel_led_line32_t <= "00" ;
ELSE
sel_led_line32_t <= sel_led_line32_t + '1' ;
END IF ;
END IF ;
sel_led_line32 <= sel_led_line32_t ;
END PROCESS ;
END beha_led ;
--follow is 16*16 led display control
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY SCAN IS
PORT ( CLKL : IN STD_LOGIC;
POINT,EXTINGGUISH : IN STD_LOGIC;
DATA : IN INTEGER RANGE 0 TO 15 ;
DISPLAY_R : OUT STD_LOGIC_VECTOR(4 DOWNTO 0) ;
SCAN_L : OUT STD_LOGIC_VECTOR(1 DOWNTO 0) );
END SCAN;
ARCHITECTURE BEHA OF SCAN IS
SIGNAL SCAN_L_CONT : STD_LOGIC_VECTOR(1 DOWNTO 0) ;
BEGIN
PROCESS (CLKL)
BEGIN
IF RISING_EDGE(CLKL) THEN
IF SCAN_L_CONT = "11" THEN
SCAN_L_CONT <= "00" ;
ELSE
SCAN_L_CONT <= SCAN_L_CONT + '1' ;
END IF ;
END IF ;
SCAN_L <= SCAN_L_CONT ;
END PROCESS ;
--FOLLOW IS DECODE
PROCESS (SCAN_L_CONT,DATA,POINT,EXTINGGUISH)
BEGIN
IF EXTINGGUISH = '1' THEN
DISPLAY_R <= "00000" ;
ELSE
CASE SCAN_L_CONT IS
WHEN "00" =>
CASE DATA IS
WHEN 0 => DISPLAY_R <= "11111" ;
WHEN 1 => DISPLAY_R <= "00000" ;
WHEN 2 => DISPLAY_R <= "10111" ;
WHEN 3 => DISPLAY_R <= "10101" ;
WHEN 4 => DISPLAY_R <= "11100" ;
WHEN 5 => DISPLAY_R <= "11101" ;
WHEN 6 => DISPLAY_R <= "11111" ;
WHEN 7 => DISPLAY_R <= "10000" ;
WHEN 8 => DISPLAY_R <= "11111" ;
WHEN 9 => DISPLAY_R <= "11101" ;
WHEN 10 => DISPLAY_R <= "01111" ;
WHEN 11 => DISPLAY_R <= "11111" ;
--follow 3 line is for diplay C,D,E,
--but for this design,it's modified
--WHEN 12 => DISPLAY_R <= "11111" ;
--WHEN 13 => DISPLAY_R <= "00111" ;
--WHEN 14 => DISPLAY_R <= "11111" ;
WHEN 12 => DISPLAY_R <= "11111" ;
WHEN 13 => DISPLAY_R <= "11111" ;
WHEN 14 => DISPLAY_R <= "11111" ;
--above 3 line is for this design
WHEN 15 => DISPLAY_R <= "11111" ;
WHEN OTHERS => DISPLAY_R <= "00000" ;
END CASE ;
WHEN "01" =>
CASE DATA IS
WHEN 0 => DISPLAY_R <= "10001" ;
WHEN 1 => DISPLAY_R <= "00000" ;
WHEN 2 => DISPLAY_R <= "10101" ;
WHEN 3 => DISPLAY_R <= "10101" ;
WHEN 4 => DISPLAY_R <= "00100" ;
WHEN 5 => DISPLAY_R <= "10101" ;
WHEN 6 => DISPLAY_R <= "10101" ;
WHEN 7 => DISPLAY_R <= "10000" ;
WHEN 8 => DISPLAY_R <= "10101" ;
WHEN 9 => DISPLAY_R <= "10101" ;
WHEN 10 => DISPLAY_R <= "10100" ;
WHEN 11 => DISPLAY_R <= "00101" ;
--follow 3 line is for diplay C,D,E,
--but for this design,it's modified
--WHEN 12 => DISPLAY_R <= "10001" ;
--WHEN 13 => DISPLAY_R <= "00101" ;
--WHEN 14 => DISPLAY_R <= "10101" ;
WHEN 12 => DISPLAY_R <= "00100" ;
WHEN 13 => DISPLAY_R <= "01010" ;
WHEN 14 => DISPLAY_R <= "01000" ;
--above 3 line is for this design
WHEN 15 => DISPLAY_R <= "10100" ;
WHEN OTHERS => DISPLAY_R <= "00000" ;
END CASE ;
WHEN "10" =>
CASE DATA IS
WHEN 0 => DISPLAY_R <= "11111" ;
WHEN 1 => DISPLAY_R <= "11111" ;
WHEN 2 => DISPLAY_R <= "11101" ;
WHEN 3 => DISPLAY_R <= "11111" ;
WHEN 4 => DISPLAY_R <= "11111" ;
WHEN 5 => DISPLAY_R <= "10111" ;
WHEN 6 => DISPLAY_R <= "10111" ;
WHEN 7 => DISPLAY_R <= "11111" ;
WHEN 8 => DISPLAY_R <= "11111" ;
WHEN 9 => DISPLAY_R <= "11111" ;
WHEN 10 => DISPLAY_R <= "01111" ;
WHEN 11 => DISPLAY_R <= "00111" ;
--follow 3 line is for diplay C,D,E,
--but for this design,it's modified
--WHEN 12 => DISPLAY_R <= "10001" ;
--WHEN 13 => DISPLAY_R <= "11111" ;
--WHEN 14 => DISPLAY_R <= "10101" ;
WHEN 12 => DISPLAY_R <= "11111" ;
WHEN 13 => DISPLAY_R <= "10001" ;
WHEN 14 => DISPLAY_R <= "11111" ;
--above 3 line is for this design
WHEN 15 => DISPLAY_R <= "10100" ;
WHEN OTHERS => DISPLAY_R <= "00000" ;
END CASE ;
WHEN "11" => IF POINT = '1' THEN
DISPLAY_R <= "00001" ;
ELSE
DISPLAY_R <= "00000" ;
END IF ;
WHEN OTHERS => DISPLAY_R <= "00000" ;
END CASE ;
END IF ;
END PROCESS ;
END ;
--FOLLOW IS TOP ENTITY
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.std_logic_unsigned.ALL;
ENTITY frequ_er IS
PORT ( clk_1kh,clk_8kh,clk_exter : IN std_logic;
sel_led_line10, sel_led_line32 : OUT std_logic_vector(1 downto 0);
alarm : OUT std_logic ;
led_display_cont, led_display_scale : OUT std_logic_vector(4 downto 0));
END frequ_er ;
ARCHITECTURE stru OF frequ_er IS
COMPONENT basifre_product
PORT ( clk_1kh : IN std_logic;
fre_100h,fre_10h,fre_1h : OUT std_logic);
END COMPONENT ;
COMPONENT mux_basifre
PORT ( fre_1kh,fre_100h,fre_10h,fre_1h : IN std_logic ;
rst_mux_basifre,en : IN std_logic ;
sel_fre : IN integer RANGE 0 TO 3;
basi_fre : OUT std_logic );
END COMPONENT ;
COMPONENT exter_fre
PORT ( clk_exter,rst_ex_fre,en : IN std_logic ;
cont1,cont2,cont3,cont4 : OUT integer RANGE 0 TO 9 ;
ex_ov_l,ex_ov_h : OUT std_logic);
END COMPONENT ;
COMPONENT controler
PORT ( fre_10h,clk_8kh : IN std_logic ;
measure_end : IN std_logic ;
ex_ov_l,ex_ov_h : IN std_logic ;
measure,display,rst : OUT std_logic ;
alarm : OUT std_logic ;
sel_basifre : OUT integer RANGE 0 TO 3 );
END COMPONENT ;
COMPONENT display
PORT( clk_8kh, clk_1kh,display,measure_end : IN std_logic;
ex_cont1,ex_cont2,ex_cont3,ex_cont4 : IN integer RANGE 0 TO 9 ;
sel_scale : IN integer RANGE 0 TO 3 ;
sel_led_line10, sel_led_line32 : OUT std_logic_vector(1 downto 0);
led_display_cont, led_display_scale : OUT std_logic_vector(4 downto 0));
END COMPONENT ;
SIGNAL fre_100h_t,fre_10h_t,fre_1h_t : std_logic;
SIGNAL rst_t,measure_t,basi_fre_t : std_logic;
SIGNAL sel_fre_t : integer RANGE 0 TO 3;
SIGNAL ex_ov_l_t,ex_ov_h_t,display_t : std_logic ;
SIGNAL cont1_t,cont2_t,cont3_t,cont4_t : integer RANGE 0 TO 9 ;
BEGIN
BASIC_FREQUENCY_PROCUDE : basifre_product
PORT MAP (clk_1kh, fre_100h_t, fre_10h_t, fre_1h_t);
SELECT_BASIC_FREQUENCY : mux_basifre
PORT MAP (clk_1kh, fre_100h_t, fre_10h_t, fre_1h_t, rst_t,measure_t, sel_fre_t,basi_fre_t);
CENTRAL_CONTROLER : controler
PORT MAP (fre_10h_t, clk_8kh, basi_fre_t, ex_ov_l_t, ex_ov_h_t, measure_t, display_t, rst_t,
alarm,sel_fre_t);
LED_DISPLAY : display
PORT MAP (clk_8kh, clk_1kh, display_t, basi_fre_t, cont1_t, cont2_t, cont3_t, cont4_t,
sel_fre_t, sel_led_line10, sel_led_line32, led_display_cont, led_display_scale);
EXTER_FREQUENCY_COUNTER : exter_fre
PORT MAP (clk_exter, rst_t,basi_fre_t, cont1_t, cont2_t, cont3_t, cont4_t, ex_ov_l_t, ex_ov_h_t);
END stru;
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -