lms.vhi

VHDL写的LMS算法程序。利用本地正弦信号

-- VHDL Instantiation Created from source file lms.vhd -- 20:16:08 07/03/2005
--
-- Notes: 
-- 1) This instantiation template has been automatically generated using types
-- std_logic and std_logic_vector for the ports of the instantiated module
-- 2) To use this template to instantiate this entity, cut-and-paste and then edit

	COMPONENT lms
	PORT(
		waveIN : IN std_logic_vector(11 downto 0);
		start : IN std_logic;
		CLK : IN std_logic;          
		waveOut : OUT std_logic_vector(11 downto 0);
		eOut : OUT std_logic_vector(11 downto 0)
		);
	END COMPONENT;

	Inst_lms: lms PORT MAP(
		waveIN => ,
		waveOut => ,
		eOut => ,
		start => ,
		CLK => 
	);