genericinterruptblockcomponent.package.vhd

VHDL语言编写的中断模块,是个一般性的设计,可以很容易修改到你自己的设计中去.

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-- Copyright (c) 1999 by ALCATEL. All rights reserved.
--
-- Filename    : GenericInterruptBlockComponent.Package.vhd
--
-- Purpose     : 
--
-- Limitations : none
--
-- Authors     : welch
--
-- Projects    : mse
--
-- Tools       : Synopsys Design Compiler 9808
--               Cadence Leapfrog 97A
--
-- Reference   : 1AB 15160 AAAA PEZZA
--
-- Coding Std. : Release 2.1
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library IEEE;
use IEEE.std_logic_1164.all;

library work;
use work.pkg_GenericInterruptBlockTypes.all;

package GenericInterruptBlockComponent is

   component GenericInterruptBlock
      generic (
         EventType     : integer:=c_PosLevel;
         IMRResetValue : integer:=1
      );
      port (
         arst_NotReset   : in  boolean;
         clk_Main        : in  std_ulogic;
         BciAddress      : in  std_ulogic_vector(2 downto 0);
         BciReadData     : out std_ulogic;
         BciRdNWr        : in  boolean;
         BciWriteData    : in  std_ulogic;
         BciBlockSelect  : in  boolean;
         InterruptSource : in  std_ulogic;
         Interrupt       : out std_ulogic
      );
         
   end component;

end GenericInterruptBlockComponent;