genericinterruptblock.rtl.vhd

VHDL语言编写的中断模块,是个一般性的设计,可以很容易修改到你自己的设计中去.

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-- Copyright (c) 1999 by ALCATEL. All rights reserved.
--
-- Filename    : GenericInterruptBlock.RTL.vhd
--
-- Purpose     : 
--
-- Limitations : none
--
-- Authors     : welch
--
-- Projects    : mse
--
-- Tools       : Synopsys Design Compiler 9808
--               Cadence Leapfrog 97A
--
-- Reference   : 1AB 15160 AAAA PEZZA
--
-- Coding Std. : Release 2.1
------------------------------------------------------------------------------------------

library Alcatel;
use Alcatel.pkg_NumericVectorConversions.ToUnsignedStdULogicVector;

architecture RTL of GenericInterruptBlock is

  signal ICR                : std_ulogic;
  signal IMR                : std_ulogic;
  signal IAR                : std_ulogic;
  signal IER                : std_ulogic;
  signal ISR                : std_ulogic;
  signal InterruptCondition : std_ulogic;
  signal InterruptStatus    : std_ulogic;

begin

   --
   -- detect interrupt condition depending on the generic EventType
   --
   g_PosEdgeDecoder: if EventType = c_Posedge generate
      InterruptStatus   <='1' when (InterruptSource='1'            ) else '0';
      InterruptCondition<='1' when (InterruptSource='1' and ISR='0') else '0';
   end generate g_PosEdgeDecoder;

   g_NegEdgeDecoder: if EventType = c_Negedge generate
      InterruptStatus   <='1' when (InterruptSource='0'            ) else '0';
      InterruptCondition<='1' when (InterruptSource='0' and ISR='0') else '0';-- ISR is inverted InterruptSource!
   end generate g_NegEdgeDecoder;

   g_EdgeDecoder:      if EventType = c_Edge    generate
      InterruptStatus   <='1' when (InterruptSource='1' ) else '0';
      InterruptCondition<='1' when (InterruptSource/=ISR) else '0';
   end generate g_EdgeDecoder;

   g_PosLevelDecoder:  if EventType = c_PosLevel  generate
      InterruptCondition<='1' when (InterruptSource='1') else '0';
   end generate g_PosLevelDecoder;

   g_NegLevelDecoder:  if EventType = c_NegLevel  generate
      InterruptCondition<='1' when (InterruptSource='0') else '0';
   end generate g_NegLevelDecoder;

   g_errorcase: if ((EventType /= c_PosLevel) and 
                    (EventType /= c_NegLevel) and 
                    (EventType /= c_Edge    ) and 
                    (EventType /= c_PosEdge ) and 
                    (EventType /= c_NegEdge )
                   )
              generate
                 assert false
                 report string'("InterruptBlock.RTL: illegal generic!!")
                 severity failure;
              end generate g_errorcase;

   --
   -- all edge type interrupt inputs need a ff delaying the
   -- InterruptSource one clock to detect the edges
   --
   g_ISR: if ((EventType = c_Edge   ) or 
              (EventType = c_PosEdge) or
              (EventType = c_NegEdge)
             ) 
   generate
      p_ISR: PROCESS (clk_Main, arst_NotReset)
      begin
         if (not arst_NotReset) then
            ISR<='0';
         elsif (clk_Main'event and clk_Main='1') then
            ISR<=InterruptStatus;
         end if;
      end process p_ISR;
   end generate g_ISR;


   --
   -- ICR InterruptConditionRegister
   --
   g_LevelICR: if ((EventType = c_PosLevel) or
                   (EventType = c_NegLevel)
                  )
   generate
      p_ICR: PROCESS (clk_Main, arst_NotReset)
      begin
         --
         -- priority of ICR accesses 
         -- reset, write access, interrupt condition recognized
         --
         if (not arst_NotReset) then
            ICR<='0';
         elsif (clk_Main'event and clk_Main='1') then
            ICR<=InterruptCondition;
         end if;
      end process p_ICR;
   end generate g_LevelICR;

   g_EventICR: if ((EventType = c_Edge   ) or 
                   (EventType = c_PosEdge) or
                   (EventType = c_NegEdge)
                  ) 
   generate
      p_ICR: PROCESS (clk_Main, arst_NotReset)
      begin
         --
         -- priority of ICR accesses 
         -- reset, write access, interrupt condition recognized, sideeffect from reading IER
         --
         -- setting due to InterruptCondtion has priority before
         -- clearing due to side effect from reading IER
         -- not to loose an interrupt at the moment of reading IER
         --
         if (not arst_NotReset) then
            ICR<='0';
         elsif (clk_Main'event and clk_Main='1') then
            if ((BciBlockSelect=true          ) and
                (BciRdNWr      =false         ) and
                (BciAddress    =c_ICRCAddress ) and
                (BciWriteData  ='1'           )
                )
            then
               ICR<='0';
            elsif ((BciBlockSelect=true          ) and
                   (BciRdNWr      =false         ) and
                   (BciAddress    =c_ICRSAddress ) and
                   (BciWriteData  ='1'           )
                  )
            then
               ICR<='1';
            elsif (InterruptCondition='1') then
               ICR<='1';
            elsif ((BciBlockSelect=true        ) and
                   (BciRdNWr      =true        ) and
                   (BciAddress    =c_IERAddress) and
                   (IER           ='1'         )
                  )
            then
               ICR<='0';   -- clear if interrupt event is read
            else
               ICR<=ICR;
            end if;
         end if;
      end process p_ICR;
   end generate g_EventICR;


   --
   -- IMR InterruptMaskRegister
   --
   p_IMR: PROCESS (clk_Main, arst_NotReset)
      variable IMRBV : std_ulogic_vector(1 downto 0);
   begin
      --
      -- priority of IMR accesses 
      -- reset, write access
      --
      if (not arst_NotReset) then
         IMRBV    := ToUnsignedStdULogicVector(natural(IMRResetValue),2);
         IMR      <= IMRBV(0);
      elsif (clk_Main'event and clk_Main='1') then
         if ((BciBlockSelect=true        ) and
             (BciRdNWr      =false       ) and
             (BciAddress    =c_IMRAddress)
            )
         then
            IMR<=BciWriteData;
         else
            IMR<=IMR;
         end if;
      end if;
   end process p_IMR;



   --
   -- IAR InterruptAcknowledgeRegister
   --
   p_IAR: PROCESS (clk_Main, arst_NotReset)
   begin
      --
      -- priority of IAR accesses 
      -- reset, write access, sideeffect from reading IER
      --
      if (not arst_NotReset) then
         IAR<='0';
      elsif (clk_Main'event and clk_Main='1') then
         if ((BciBlockSelect=true         ) and
             (BciRdNWr      =false        ) and
             (BciAddress    =c_IARCAddress) and
             (BciWriteData  ='1'          )
            )
         then
             IAR<='0';
         elsif ((BciBlockSelect=true        ) and
                (BciRdNWr      =true        ) and
                (BciAddress    =c_IERAddress) and
                (IER           ='1'         )
               )
         then
            IAR<='1';
         else
            IAR<=IAR;
         end if;
      end if;
   end process p_IAR;

   --
   -- IER InterruptEventRegister
   -- Note : this "register" has no own ff!
   --        It's a combination of other ff's.
   --
   p_IER: PROCESS (ICR,IAR,IMR)
   begin
      if (ICR='1' and IMR='0' and IAR='0')
      then
         IER<='1';
      else   
         IER<='0';
      end if;
   end process p_IER;


   g_EventReadAccess: if ((EventType = c_Edge   ) or 
                          (EventType = c_PosEdge) or
                          (EventType = c_NegEdge)
                         ) 
   generate
      --
      -- map register to BciReadData
      --
      p_EventReadAccess:process(BciAddress,BciBlockSelect,ICR,IMR,IER,IAR,ISR)
      begin
         if (BciBlockSelect=true)
         then
            case BciAddress is
               when c_ICRSAddress => BciReadData<=ICR;
               when c_ICRCAddress => BciReadData<=ICR;
               when c_IMRAddress  => BciReadData<=IMR;
               when c_IERAddress  => BciReadData<=IER;
               when c_IARCAddress => BciReadData<=IAR;
               when c_ISRAddress  => BciReadData<=ISR;
               when others        => BciReadData<='0';
            end case;
          else
            BciReadData<='0';
         end if;
      end process p_EventReadAccess;
   end generate g_EventReadAccess;


   g_LevelReadAccess: if ((EventType = c_PosLevel) or
                          (EventType = c_NegLevel)
                         )
   generate
      --
      -- map register to BciReadData
      --
      p_LevelReadAccess:process(BciAddress,BciBlockSelect,ICR,IMR,IER,IAR)
      begin
         if (BciBlockSelect=true)
         then
            case BciAddress is
               when c_ICRSAddress => BciReadData<=ICR;
               when c_ICRCAddress => BciReadData<=ICR;
               when c_IMRAddress  => BciReadData<=IMR;
               when c_IERAddress  => BciReadData<=IER;
               when c_IARCAddress => BciReadData<=IAR;
               when others        => BciReadData<='0';
            end case;
          else
            BciReadData<='0';
         end if;
      end process p_LevelReadAccess;
   end generate g_LevelReadAccess;

   Interrupt<=IER;


end RTL;