fifo.hier_info

8*8位的先入先出（fifo）数据缓冲器的vhdl源程序

|fifo
clk => ram_22.CLK
clk => ram_23.CLK
clk => ram_24.CLK
clk => ram_25.CLK
clk => ram_26.CLK
clk => ram_27.CLK
clk => ram_28.CLK
clk => ram_29.CLK
clk => ram_30.CLK
clk => ram_31.CLK
clk => ram_32.CLK
clk => wp[2].CLK
clk => wp[1].CLK
clk => wp[0].CLK
clk => rp[2].CLK
clk => rp[1].CLK
clk => rp[0].CLK
clk => in_empty.CLK
clk => in_full.CLK
clk => ram_21.CLK
clk => ram.CLK0
reset => wp[1].ACLR
reset => wp[0].ACLR
reset => rp[2].PRESET
reset => rp[1].PRESET
reset => rp[0].PRESET
reset => in_empty.PRESET
reset => in_full.ACLR
reset => wp[2].ACLR
wr => process3~6.IN1
wr => process4~3.IN0
wr => process3~8.IN1
wr => process0~0.IN1
rd => process4~4.IN0
rd => dout[6]$latch.LATCH_ENABLE
rd => dout[5]$latch.LATCH_ENABLE
rd => dout[4]$latch.LATCH_ENABLE
rd => dout[3]$latch.LATCH_ENABLE
rd => dout[2]$latch.LATCH_ENABLE
rd => process2~0.IN1
rd => dout[1]$latch.LATCH_ENABLE
rd => process3~6.IN0
rd => dout[0]$latch.LATCH_ENABLE
rd => process4~5.IN1
rd => dout[7]$latch.LATCH_ENABLE
din[0] => ram_28.DATAIN
din[0] => ram.DATAIN
din[1] => ram_27.DATAIN
din[1] => ram.DATAIN1
din[2] => ram_26.DATAIN
din[2] => ram.DATAIN2
din[3] => ram_25.DATAIN
din[3] => ram.DATAIN3
din[4] => ram_24.DATAIN
din[4] => ram.DATAIN4
din[5] => ram_23.DATAIN
din[5] => ram.DATAIN5
din[6] => ram_22.DATAIN
din[6] => ram.DATAIN6
din[7] => ram_21.DATAIN
din[7] => ram.DATAIN7
dout[0] <= dout[0]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[1] <= dout[1]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[2] <= dout[2]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[3] <= dout[3]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[4] <= dout[4]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[5] <= dout[5]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[6] <= dout[6]$latch.DB_MAX_OUTPUT_PORT_TYPE
dout[7] <= dout[7]$latch.DB_MAX_OUTPUT_PORT_TYPE
full <= in_full.DB_MAX_OUTPUT_PORT_TYPE
empty <= in_empty.DB_MAX_OUTPUT_PORT_TYPE