fifo.map.eqn

8*8位的先入先出（fifo）数据缓冲器的vhdl源程序

--A1L151 is ram~203
--operation mode is normal

A1L151 = rp[0] & (A1L051) # !rp[0] & (A1L051 & (A1L69Q) # !A1L051 & A1L08Q);


--A1L93 is dout~1469
--operation mode is normal

A1L93 = A1L83 # rp[2] & A1L151 & !A1L82;


--dout[4]$latch is dout[4]$latch
--operation mode is normal

dout[4]$latch = rd & (dout[4]$latch) # !rd & A1L93;


--ram_23 is ram_23
--operation mode is normal

ram_23_lut_out = din[5];
ram_23 = DFFEAS(ram_23_lut_out, clk, VCC, , , , , , );


--A1L121Q is ram~69
--operation mode is normal

A1L121Q_lut_out = din[5];
A1L121Q = DFFEAS(A1L121Q_lut_out, clk, VCC, , A1L671, , , , );


--A1L311Q is ram~61
--operation mode is normal

A1L311Q_lut_out = din[5];
A1L311Q = DFFEAS(A1L311Q_lut_out, clk, VCC, , A1L771, , , , );


--A1L501Q is ram~53
--operation mode is normal

A1L501Q_lut_out = din[5];
A1L501Q = DFFEAS(A1L501Q_lut_out, clk, VCC, , A1L871, , , , );


--A1L251 is ram~204
--operation mode is normal

A1L251 = rp[1] & (rp[0] & (A1L501Q) # !rp[0] & A1L311Q) # !rp[1] & (!rp[0]);


--A1L921Q is ram~77
--operation mode is normal

A1L921Q_lut_out = din[5];
A1L921Q = DFFEAS(A1L921Q_lut_out, clk, VCC, , A1L971, , , , );


--A1L351 is ram~205
--operation mode is normal

A1L351 = rp[1] & (A1L251) # !rp[1] & (A1L251 & (A1L921Q) # !A1L251 & A1L121Q);


--A1L04 is dout~1470
--operation mode is normal

A1L04 = A1L82 & ram_23 # !A1L82 & (A1L351 & !rp[2]);


--A1L18Q is ram~29
--operation mode is normal

A1L18Q_lut_out = din[5];
A1L18Q = DFFEAS(A1L18Q_lut_out, clk, VCC, , A1L371, , , , );


--A1L98Q is ram~37
--operation mode is normal

A1L98Q_lut_out = din[5];
A1L98Q = DFFEAS(A1L98Q_lut_out, clk, VCC, , A1L271, , , , );


--A1L37Q is ram~21
--operation mode is normal

A1L37Q_lut_out = din[5];
A1L37Q = DFFEAS(A1L37Q_lut_out, clk, VCC, , A1L471, , , , );


--A1L451 is ram~206
--operation mode is normal

A1L451 = rp[0] & (rp[1] & (A1L37Q) # !rp[1] & A1L98Q) # !rp[0] & (!rp[1]);


--A1L79Q is ram~45
--operation mode is normal

A1L79Q_lut_out = din[5];
A1L79Q = DFFEAS(A1L79Q_lut_out, clk, VCC, , A1L571, , , , );


--A1L551 is ram~207
--operation mode is normal

A1L551 = rp[0] & (A1L451) # !rp[0] & (A1L451 & (A1L79Q) # !A1L451 & A1L18Q);


--A1L14 is dout~1471
--operation mode is normal

A1L14 = A1L04 # rp[2] & A1L551 & !A1L82;


--dout[5]$latch is dout[5]$latch
--operation mode is normal

dout[5]$latch = rd & (dout[5]$latch) # !rd & A1L14;


--ram_22 is ram_22
--operation mode is normal

ram_22_lut_out = din[6];
ram_22 = DFFEAS(ram_22_lut_out, clk, VCC, , , , , , );


--A1L221Q is ram~70
--operation mode is normal

A1L221Q_lut_out = din[6];
A1L221Q = DFFEAS(A1L221Q_lut_out, clk, VCC, , A1L671, , , , );


--A1L411Q is ram~62
--operation mode is normal

A1L411Q_lut_out = din[6];
A1L411Q = DFFEAS(A1L411Q_lut_out, clk, VCC, , A1L771, , , , );


--A1L601Q is ram~54
--operation mode is normal

A1L601Q_lut_out = din[6];
A1L601Q = DFFEAS(A1L601Q_lut_out, clk, VCC, , A1L871, , , , );


--A1L651 is ram~208
--operation mode is normal

A1L651 = rp[1] & (rp[0] & (A1L601Q) # !rp[0] & A1L411Q) # !rp[1] & (!rp[0]);


--A1L031Q is ram~78
--operation mode is normal

A1L031Q_lut_out = din[6];
A1L031Q = DFFEAS(A1L031Q_lut_out, clk, VCC, , A1L971, , , , );


--A1L751 is ram~209
--operation mode is normal

A1L751 = rp[1] & (A1L651) # !rp[1] & (A1L651 & (A1L031Q) # !A1L651 & A1L221Q);


--A1L24 is dout~1472
--operation mode is normal

A1L24 = A1L82 & ram_22 # !A1L82 & (A1L751 & !rp[2]);


--A1L28Q is ram~30
--operation mode is normal

A1L28Q_lut_out = din[6];
A1L28Q = DFFEAS(A1L28Q_lut_out, clk, VCC, , A1L371, , , , );


--A1L09Q is ram~38
--operation mode is normal

A1L09Q_lut_out = din[6];
A1L09Q = DFFEAS(A1L09Q_lut_out, clk, VCC, , A1L271, , , , );


--A1L47Q is ram~22
--operation mode is normal

A1L47Q_lut_out = din[6];
A1L47Q = DFFEAS(A1L47Q_lut_out, clk, VCC, , A1L471, , , , );


--A1L851 is ram~210
--operation mode is normal

A1L851 = rp[0] & (rp[1] & (A1L47Q) # !rp[1] & A1L09Q) # !rp[0] & (!rp[1]);


--A1L89Q is ram~46
--operation mode is normal

A1L89Q_lut_out = din[6];
A1L89Q = DFFEAS(A1L89Q_lut_out, clk, VCC, , A1L571, , , , );


--A1L951 is ram~211
--operation mode is normal

A1L951 = rp[0] & (A1L851) # !rp[0] & (A1L851 & (A1L89Q) # !A1L851 & A1L28Q);


--A1L34 is dout~1473
--operation mode is normal

A1L34 = A1L24 # rp[2] & A1L951 & !A1L82;


--dout[6]$latch is dout[6]$latch
--operation mode is normal

dout[6]$latch = rd & (dout[6]$latch) # !rd & A1L34;


--ram_21 is ram_21
--operation mode is normal

ram_21_lut_out = din[7];
ram_21 = DFFEAS(ram_21_lut_out, clk, VCC, , , , , , );


--A1L321Q is ram~71
--operation mode is normal

A1L321Q_lut_out = din[7];
A1L321Q = DFFEAS(A1L321Q_lut_out, clk, VCC, , A1L671, , , , );


--A1L511Q is ram~63
--operation mode is normal

A1L511Q_lut_out = din[7];
A1L511Q = DFFEAS(A1L511Q_lut_out, clk, VCC, , A1L771, , , , );


--A1L701Q is ram~55
--operation mode is normal

A1L701Q_lut_out = din[7];
A1L701Q = DFFEAS(A1L701Q_lut_out, clk, VCC, , A1L871, , , , );


--A1L061 is ram~212
--operation mode is normal

A1L061 = rp[1] & (rp[0] & (A1L701Q) # !rp[0] & A1L511Q) # !rp[1] & (!rp[0]);


--A1L131Q is ram~79
--operation mode is normal

A1L131Q_lut_out = din[7];
A1L131Q = DFFEAS(A1L131Q_lut_out, clk, VCC, , A1L971, , , , );


--A1L161 is ram~213
--operation mode is normal

A1L161 = rp[1] & (A1L061) # !rp[1] & (A1L061 & (A1L131Q) # !A1L061 & A1L321Q);


--A1L44 is dout~1474
--operation mode is normal

A1L44 = A1L82 & ram_21 # !A1L82 & (A1L161 & !rp[2]);


--A1L38Q is ram~31
--operation mode is normal

A1L38Q_lut_out = din[7];
A1L38Q = DFFEAS(A1L38Q_lut_out, clk, VCC, , A1L371, , , , );


--A1L19Q is ram~39
--operation mode is normal

A1L19Q_lut_out = din[7];
A1L19Q = DFFEAS(A1L19Q_lut_out, clk, VCC, , A1L271, , , , );


--A1L57Q is ram~23
--operation mode is normal

A1L57Q_lut_out = din[7];
A1L57Q = DFFEAS(A1L57Q_lut_out, clk, VCC, , A1L471, , , , );


--A1L261 is ram~214
--operation mode is normal

A1L261 = rp[0] & (rp[1] & (A1L57Q) # !rp[1] & A1L19Q) # !rp[0] & (!rp[1]);


--A1L99Q is ram~47
--operation mode is normal

A1L99Q_lut_out = din[7];
A1L99Q = DFFEAS(A1L99Q_lut_out, clk, VCC, , A1L571, , , , );


--A1L361 is ram~215
--operation mode is normal

A1L361 = rp[0] & (A1L261) # !rp[0] & (A1L261 & (A1L99Q) # !A1L261 & A1L38Q);


--A1L54 is dout~1475
--operation mode is normal

A1L54 = A1L44 # rp[2] & A1L361 & !A1L82;


--dout[7]$latch is dout[7]$latch
--operation mode is normal

dout[7]$latch = rd & (dout[7]$latch) # !rd & A1L54;


--wp[0] is wp[0]
--operation mode is normal

wp[0]_lut_out = !wp[0];
wp[0] = DFFEAS(wp[0]_lut_out, clk, !reset, , A1L45, , , , );


--wp[2] is wp[2]
--operation mode is normal

wp[2]_lut_out = !wp[2];
wp[2] = DFFEAS(wp[2]_lut_out, clk, !reset, , A1L181, , , , );


--A1L25 is in_full~151
--operation mode is normal

A1L25 = rp[0] & !wp[0] & (rp[2] $ wp[2]) # !rp[0] & wp[0] & (rp[2] $ wp[2]);


--wp[1] is wp[1]
--operation mode is normal

wp[1]_lut_out = !wp[1];
wp[1] = DFFEAS(wp[1]_lut_out, clk, !reset, , A1L081, , , , );


--A1L35 is in_full~152
--operation mode is normal

A1L35 = !wr & (rp[1] $ wp[1]);


--A1L94 is in_empty~385
--operation mode is normal

A1L94 = !rd & (rp[0] $ wp[0]);


--A1L55 is process2~0
--operation mode is normal

A1L55 = !rd & (in_empty);


--A1L171 is rp[2]~74
--operation mode is normal

A1L171 = in_empty & !rp[1] & !rp[0] & !rd;


--A1L45 is process0~0
--operation mode is normal

A1L45 = !in_full & !wr;


--A1L961 is rp[1]~75
--operation mode is normal

A1L961 = in_empty & (!rp[0] & !rd);


--A1L671 is rtl~4
--operation mode is normal

A1L671 = wp[2] & wp[1] & !wp[0] & A1L45;


--A1L081 is rtl~118
--operation mode is normal

A1L081 = wp[0] & (!in_full & !wr);


--A1L771 is rtl~5
--operation mode is normal

A1L771 = wp[2] & A1L081 & (!wp[1]);


--A1L871 is rtl~6
--operation mode is normal

A1L871 = wp[2] & !wp[0] & !wp[1] & A1L45;


--A1L181 is rtl~119
--operation mode is normal

A1L181 = wp[0] & wp[1] & !in_full & !wr;


--A1L971 is rtl~7
--operation mode is normal

A1L971 = wp[2] & A1L181;


--A1L271 is rtl~0
--operation mode is normal

A1L271 = wp[1] & !wp[2] & !wp[0] & A1L45;


--A1L571 is rtl~3
--operation mode is normal

A1L571 = A1L181 & (!wp[2]);


--A1L371 is rtl~1
--operation mode is normal

A1L371 = !wp[2] & !wp[1] & A1L081;


--A1L471 is rtl~2
--operation mode is normal

A1L471 = !wp[2] & !wp[1] & !wp[0] & A1L45;


--A1L05 is in_empty~387
--operation mode is normal

A1L05 = wp[1] & rp[1] & (wp[2] $ rp[2]) # !wp[1] & !rp[1] & (wp[2] $ !rp[2]);


--rd is rd
--operation mode is input

rd = INPUT();


--wr is wr
--operation mode is input

wr = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--reset is reset
--operation mode is input

reset = INPUT();


--din[0] is din[0]
--operation mode is input

din[0] = INPUT();


--din[1] is din[1]
--operation mode is input

din[1] = INPUT();


--din[2] is din[2]
--operation mode is input

din[2] = INPUT();


--din[3] is din[3]
--operation mode is input

din[3] = INPUT();


--din[4] is din[4]
--operation mode is input

din[4] = INPUT();


--din[5] is din[5]
--operation mode is input

din[5] = INPUT();


--din[6] is din[6]
--operation mode is input

din[6] = INPUT();


--din[7] is din[7]
--operation mode is input

din[7] = INPUT();


--dout[0] is dout[0]
--operation mode is output

dout[0] = OUTPUT(dout[0]$latch);


--dout[1] is dout[1]
--operation mode is output

dout[1] = OUTPUT(dout[1]$latch);


--dout[2] is dout[2]
--operation mode is output

dout[2] = OUTPUT(dout[2]$latch);


--dout[3] is dout[3]
--operation mode is output

dout[3] = OUTPUT(dout[3]$latch);


--dout[4] is dout[4]
--operation mode is output

dout[4] = OUTPUT(dout[4]$latch);


--dout[5] is dout[5]
--operation mode is output

dout[5] = OUTPUT(dout[5]$latch);


--dout[6] is dout[6]
--operation mode is output

dout[6] = OUTPUT(dout[6]$latch);


--dout[7] is dout[7]
--operation mode is output

dout[7] = OUTPUT(dout[7]$latch);


--full is full
--operation mode is output

full = OUTPUT(in_full);


--empty is empty
--operation mode is output

empty = OUTPUT(!in_empty);