mcode.map.eqn

一个典型的m序列发生器

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--m[0] is m[0]
--operation mode is normal

m[0]_lut_out = m[1];
m[0] = DFFEAS(m[0]_lut_out, clk, VCC, , , , , , );


--m[1] is m[1]
--operation mode is normal

m[1]_lut_out = m[2];
m[1] = DFFEAS(m[1]_lut_out, clk, VCC, , , , , , );


--m[2] is m[2]
--operation mode is normal

m[2]_lut_out = m[0] & (!m[1]) # !m[0] & (m[1] # !m[2]);
m[2] = DFFEAS(m[2]_lut_out, clk, VCC, , , , , , );


--clk is clk
--operation mode is input

clk = INPUT();


--code is code
--operation mode is output

code = OUTPUT(m[0]);