cpu_mm_manager3.fit.eqn

利用VHDL语言描述的一个简单微处理器,可以通过修改源码来调整指令集,可以在Quartus II上直接运行和编译.

--operation mode is normal

A1L224 = AddrR_out[0] & (AddrR_out[1] # A1L824) # !AddrR_out[0] & A1L424 & !AddrR_out[1];


--MM_RE_C[7] is MM_RE_C[7] at LC_X32_Y23_N1
--operation mode is normal

MM_RE_C[7]_lut_out = A1L865;
MM_RE_C[7] = DFFEA(MM_RE_C[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L792, , );


--A1L924 is Mux~1263 at LC_X32_Y27_N3
--operation mode is normal

MM_RE_E[7]_qfbk = MM_RE_E[7];
A1L924 = AddrR_out[2] & (AddrR_out[3] # MM_RE_E[7]_qfbk) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_C[7];

--MM_RE_E[7] is MM_RE_E[7] at LC_X32_Y27_N3
--operation mode is normal

MM_RE_E[7]_sload_eqn = A1L865;
MM_RE_E[7] = DFFEA(MM_RE_E[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L713, , );


--MM_RE_F[7] is MM_RE_F[7] at LC_X36_Y26_N8
--operation mode is normal

MM_RE_F[7]_lut_out = A1L865;
MM_RE_F[7] = DFFEA(MM_RE_F[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L723, , );


--A1L034 is Mux~1264 at LC_X33_Y26_N5
--operation mode is normal

MM_RE_D[7]_qfbk = MM_RE_D[7];
A1L034 = A1L924 & (MM_RE_F[7] # !AddrR_out[3]) # !A1L924 & MM_RE_D[7]_qfbk & AddrR_out[3];

--MM_RE_D[7] is MM_RE_D[7] at LC_X33_Y26_N5
--operation mode is normal

MM_RE_D[7]_sload_eqn = A1L865;
MM_RE_D[7] = DFFEA(MM_RE_D[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L703, , );


--R_out[7] is R_out[7] at LC_X34_Y21_N5
--operation mode is normal

R_out[7]_lut_out = A1L853 & (R_to_ALU[1] # R_out[7]) # !A1L853 & !R1[7] & !R_to_ALU[1];
R_out[7] = DFFEA(R_out[7]_lut_out, GLOBAL(clk), VCC, , reset, , );


--A1L421 is DataOut[7]~223 at LC_X34_Y21_N1
--operation mode is normal

A1L421 = LCELL(R_out[7] & (A1L421 # DataOut_to_bus) # !R_out[7] & A1L421 & !DataOut_to_bus);


--DataorALU_to_bus is DataorALU_to_bus at LC_X36_Y23_N1
--operation mode is normal

DataorALU_to_bus_lut_out = A1L516 & !A1L316 & (!A1L044 # !A1L247Q);
DataorALU_to_bus = DFFEA(DataorALU_to_bus_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L426, , );


--A1L99Q is control_process_2~3 at LC_X36_Y23_N9
--operation mode is normal

A1L99Q_lut_out = !A1L626 & A1L516 & !A1L726 & !A1L526;
A1L99Q = DFFEA(A1L99Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L426, , );


--A1L545 is Select1_process~632 at LC_X40_Y23_N6
--operation mode is normal

A1L545 = DataorALU_to_bus & (A1L99Q & A1L77 # !A1L99Q & A1L455) # !DataorALU_to_bus & A1L77;

--R1[0] is R1[0] at LC_X40_Y23_N6
--operation mode is normal

R1[0] = DFFEA(A1L545, GLOBAL(clk), GLOBAL(reset), , A1L964, , );


--A1L134 is OP.idle_t~20 at LC_X41_Y22_N3
--operation mode is normal

A1L134 = !IR[1] & !IR[0] & !IR[2] & IR[3];


--R_in[1] is R_in[1] at LC_X35_Y20_N0
--operation mode is normal

R_in[1]_lut_out = !A1L336 & A1L095 & !A1L146 & !A1L926;
R_in[1] = DFFEA(R_in[1]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );


--R_Enable is R_Enable at LC_X39_Y17_N0
--operation mode is normal

R_Enable_lut_out = A1L746 # R_Enable & (A1L846 # !A1L946);
R_Enable = DFFEA(R_Enable_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );


--R_in[0] is R_in[0] at LC_X36_Y22_N1
--operation mode is normal

R_in[0]_lut_out = !A1L156 & !A1L456 & A1L095 & !A1L166;
R_in[0] = DFFEA(R_in[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , , , );


--A1L054 is R0[0]~4 at LC_X36_Y22_N4
--operation mode is normal

A1L054 = R_in[1] & R_in[0] & R_Enable;


--A1L645 is Select1_process~633 at LC_X41_Y22_N7
--operation mode is normal

A1L645 = DataorALU_to_bus & (A1L99Q & A1L97 # !A1L99Q & A1L655) # !DataorALU_to_bus & A1L97;

--R1[1] is R1[1] at LC_X41_Y22_N7
--operation mode is normal

R1[1] = DFFEA(A1L645, GLOBAL(clk), GLOBAL(reset), , A1L964, , );


--A1L745 is Select1_process~634 at LC_X39_Y20_N8
--operation mode is normal

A1L745 = A1L99Q & A1L18 # !A1L99Q & (DataorALU_to_bus & A1L855 # !DataorALU_to_bus & A1L18);

--R1[2] is R1[2] at LC_X39_Y20_N8
--operation mode is normal

R1[2] = DFFEA(A1L745, GLOBAL(clk), GLOBAL(reset), , A1L964, , );


--A1L845 is Select1_process~635 at LC_X35_Y21_N9
--operation mode is normal

A1L845 = DataorALU_to_bus & (A1L99Q & A1L38 # !A1L99Q & A1L065) # !DataorALU_to_bus & A1L38;

--R1[3] is R1[3] at LC_X35_Y21_N9
--operation mode is normal

R1[3] = DFFEA(A1L845, GLOBAL(clk), GLOBAL(reset), , A1L964, , );


--A1L945 is Select1_process~636 at LC_X40_Y17_N0
--operation mode is normal

A1L945 = A1L99Q & A1L58 # !A1L99Q & (DataorALU_to_bus & A1L265 # !DataorALU_to_bus & A1L58);

--R0[4] is R0[4] at LC_X40_Y17_N0
--operation mode is normal

R0[4] = DFFEA(A1L945, GLOBAL(clk), GLOBAL(reset), , A1L054, , );


--A1L055 is Select1_process~637 at LC_X40_Y17_N3
--operation mode is normal

A1L055 = A1L99Q & A1L78 # !A1L99Q & (DataorALU_to_bus & A1L465 # !DataorALU_to_bus & A1L78);

--R1[5] is R1[5] at LC_X40_Y17_N3
--operation mode is normal

R1[5] = DFFEA(A1L055, GLOBAL(clk), GLOBAL(reset), , A1L964, , );


--A1L155 is Select1_process~638 at LC_X40_Y20_N9
--operation mode is normal

A1L155 = A1L99Q & A1L98 # !A1L99Q & (DataorALU_to_bus & A1L665 # !DataorALU_to_bus & A1L98);

--R0[6] is R0[6] at LC_X40_Y20_N9
--operation mode is normal

R0[6] = DFFEA(A1L155, GLOBAL(clk), GLOBAL(reset), , A1L054, , );


--A1L255 is Select1_process~639 at LC_X40_Y18_N3
--operation mode is normal

A1L255 = DataorALU_to_bus & (A1L99Q & A1L19 # !A1L99Q & A1L865) # !DataorALU_to_bus & A1L19;


--A1L964 is R1[0]~0 at LC_X36_Y22_N7
--operation mode is normal

A1L964 = !R_in[1] & R_in[0] & R_Enable;


--A1L884 is R2[0]~28 at LC_X39_Y17_N1
--operation mode is normal

A1L884 = !R_in[0] & R_Enable & R_in[1];


--A1L543 is Mux~1111 at LC_X34_Y25_N6
--operation mode is normal

A1L543 = AddrR_out[2] & !AddrR_out[3] & !AddrR_out[1] & AddrR_out[0];


--A1L772 is MM_RE_A[0]~0 at LC_X34_Y25_N7
--operation mode is normal

A1L772 = A1L543 & (Initial # WriteMEM);


--IP_out[2] is IP_out[2] at LC_X34_Y20_N4
--operation mode is normal

IP_out[2]_lut_out = IP_in[1] & IR[6] # !IP_in[1] & (IP_out[2] $ IP_out[3]);
IP_out[2] = DFFEA(IP_out[2]_lut_out, GLOBAL(clk), GLOBAL(reset), , IP_in[0], , );


--A1L79Q is control_process_2~0 at LC_X35_Y23_N4
--operation mode is normal

A1L79Q_lut_out = A1L047Q & (A1L605 # !A1L935) # !A1L026;
A1L79Q = DFFEA(A1L79Q_lut_out, GLOBAL(clk), VCC, , A1L89, , );


--A1L251 is IPorAddrOut~9 at LC_X35_Y23_N0
--operation mode is normal

IPorAddrOut_qfbk = IPorAddrOut;
A1L251 = IPorAddrOut_qfbk # !A1L79Q;

--IPorAddrOut is IPorAddrOut at LC_X35_Y23_N0
--operation mode is normal

IPorAddrOut_sload_eqn = A1L965;
IPorAddrOut = DFFEA(IPorAddrOut_sload_eqn, GLOBAL(clk), VCC, , A1L89, , );


--A1L31 is AddrR_out[0]~38 at LC_X32_Y21_N4
--operation mode is normal

A1L31 = reset & (ReadMEM # WriteMEM # Initial);


--A1L443 is Mux~1110 at LC_X34_Y25_N4
--operation mode is normal

A1L443 = !AddrR_out[2] & AddrR_out[3] & !AddrR_out[1] & AddrR_out[0];


--A1L762 is MM_RE_9[0]~0 at LC_X34_Y24_N1
--operation mode is normal

A1L762 = A1L443 & (Initial # WriteMEM);


--IP_out[3] is IP_out[3] at LC_X34_Y20_N6
--operation mode is normal

IP_out[3]_lut_out = IP_in[1] & IR[7] # !IP_in[1] & !IP_out[3];
IP_out[3] = DFFEA(IP_out[3]_lut_out, GLOBAL(clk), GLOBAL(reset), , IP_in[0], , );


--A1L343 is Mux~1109 at LC_X35_Y24_N9
--operation mode is normal

A1L343 = AddrR_out[0] & !AddrR_out[2] & !AddrR_out[3] & !AddrR_out[1];


--A1L752 is MM_RE_8[0]~0 at LC_X35_Y24_N0
--operation mode is normal

A1L752 = A1L343 & (Initial # WriteMEM);


--A1L643 is Mux~1112 at LC_X32_Y21_N2
--operation mode is normal

A1L643 = AddrR_out[3] & AddrR_out[2] & !AddrR_out[1] & AddrR_out[0];


--A1L782 is MM_RE_B[0]~0 at LC_X32_Y21_N1
--operation mode is normal

A1L782 = A1L643 & (Initial # WriteMEM);


--IP_out[0] is IP_out[0] at LC_X34_Y20_N3
--operation mode is normal

IP_out[0]_lut_out = IP_in[1] & IR[4] # !IP_in[1] & (IP_out[0] $ A1L81);
IP_out[0] = DFFEA(IP_out[0]_lut_out, GLOBAL(clk), GLOBAL(reset), , IP_in[0], , );


--A1L043 is Mux~1106 at LC_X35_Y26_N6
--operation mode is normal

A1L043 = !AddrR_out[2] & !AddrR_out[0] & AddrR_out[1] & AddrR_out[3];


--A1L722 is MM_RE_5[0]~0 at LC_X35_Y26_N7
--operation mode is normal

A1L722 = A1L043 & (Initial # WriteMEM);


--A1L143 is Mux~1107 at LC_X35_Y26_N3
--operation mode is normal

A1L143 = AddrR_out[2] & !AddrR_out[0] & AddrR_out[1] & !AddrR_out[3];


--A1L732 is MM_RE_6[0]~0 at LC_X35_Y26_N4
--operation mode is normal

A1L732 = A1L143 & (Initial # WriteMEM);


--A1L933 is Mux~1105 at LC_X34_Y26_N5
--operation mode is normal

A1L933 = !AddrR_out[3] & AddrR_out[1] & !AddrR_out[0] & !AddrR_out[2];


--A1L712 is MM_RE_4[0]~0 at LC_X34_Y26_N4
--operation mode is normal

A1L712 = A1L933 & (Initial # WriteMEM);


--A1L243 is Mux~1108 at LC_X35_Y26_N2
--operation mode is normal

A1L243 = AddrR_out[2] & !AddrR_out[0] & AddrR_out[1] & AddrR_out[3];


--A1L742 is MM_RE_7[0]~0 at LC_X35_Y26_N5
--operation mode is normal

A1L742 = A1L243 & (Initial # WriteMEM);


--IP_out[1] is IP_out[1] at LC_X34_Y20_N5
--operation mode is normal

IP_out[1]_lut_out = IP_in[1] & IR[5] # !IP_in[1] & (IP_out[1] $ A1L71);
IP_out[1] = DFFEA(IP_out[1]_lut_out, GLOBAL(clk), GLOBAL(reset), , IP_in[0], , );


--A1L733 is Mux~1103 at LC_X34_Y25_N2
--operation mode is normal

A1L733 = AddrR_out[2] & !AddrR_out[3] & !AddrR_out[1] & !AddrR_out[0];


--A1L791 is MM_RE_2[0]~0 at LC_X33_Y24_N3
--operation mode is normal

A1L791 = A1L733 & (Initial # WriteMEM);


--A1L633 is Mux~1102 at LC_X32_Y25_N6
--operation mode is normal

A1L633 = AddrR_out[3] & !AddrR_out[2] & !AddrR_out[1] & !AddrR_out[0];


--A1L781 is MM_RE_1[0]~0 at LC_X31_Y25_N1
--operation mode is normal

A1L781 = A1L633 & (Initial # WriteMEM);


--A1L533 is Mux~1101 at LC_X33_Y26_N1
--operation mode is normal

A1L533 = !AddrR_out[3] & !AddrR_out[0] & !AddrR_out[1] & !AddrR_out[2];


--A1L771 is MM_RE_0[0]~0 at LC_X33_Y26_N2
--operation mode is normal

A1L771 = A1L533 & (WriteMEM # Initial);


--A1L833 is Mux~1104 at LC_X32_Y25_N8
--operation mode is normal

A1L833 = AddrR_out[3] & AddrR_out[2] & !AddrR_out[1] & !AddrR_out[0];


--A1L702 is MM_RE_3[0]~0 at LC_X32_Y25_N9
--operation mode is normal

A1L702 = A1L833 & (Initial # WriteMEM);


--A1L843 is Mux~1114 at LC_X33_Y26_N9
--operation mode is normal

A1L843 = AddrR_out[3] & AddrR_out[0] & AddrR_out[1] & !AddrR_out[2];


--A1L703 is MM_RE_D[0]~0 at LC_X33_Y26_N8
--operation mode is normal

A1L703 = A1L843 & (WriteMEM # Initial);


--A1L943 is Mux~1115 at LC_X33_Y22_N7
--operation mode is normal

A1L943 = AddrR_out[2] & !AddrR_out[3] & AddrR_out[0] & AddrR_out[1];


--A1L713 is MM_RE_E[0]~0 at LC_X33_Y22_N8
--operation mode is normal

A1L713 = A1L943 & (WriteMEM # Initial);


--A1L743 is Mux~1113 at LC_X33_Y22_N6
--operation mode is normal

A1L743 = !AddrR_out[2] & !AddrR_out[3] & AddrR_out[0] & AddrR_out[1];


--A1L792 is MM_RE_C[0]~0 at LC_X33_Y22_N4
--operation mode is normal

A1L792 = A1L743 & (WriteMEM # Initial);


--A1L053 is Mux~1116 at LC_X33_Y22_N2
--operation mode is normal

A1L053 = AddrR_out[2] & AddrR_out[3] & AddrR_out[0] & AddrR_out[1];


--A1L723 is MM_RE_F[0]~0 at LC_X33_Y22_N0
--operation mode is normal

A1L723 = A1L053 & (WriteMEM # Initial);


--A1L344 is OP.idle_t~33 at LC_X34_Y22_N7
--operation mode is normal

A1L344 = !IR[3] & IR[2] & IR[1] & IR[0];


--A1L49 is ALU_process~113 at LC_X40_Y18_N5
--operation mode is normal

A1L49 = !A1L147Q & !A1L247Q;


--R_to_ALU[0] is R_to_ALU[0] at LC_X35_Y17_N8
--operation mode is normal

R_to_ALU[0]_lut_out = !A1L317 & !A1L017 & (R_to_ALU[0] # !A1L617);
R_to_ALU[0] = DFFEA(R_to_ALU[0]_lut