📄 qep_data_bus.sum
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Cell: lpm_counter_16_421_0 View: LPM Library: OPERATORS
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Total accumulated area :
Number of CARRYs : 16
Number of LCs : 16
Number of ports : 20
Number of nets : 0
Number of instances : 0
Number of references to this view : 14
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Device Utilization for EPF10K30ATC144
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Resource Used Avail Utilization
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IOs 69 102 67.65%
LCs 843 1728 48.78%
DFFs 324 1968 16.46%
Memory Bits 0 12288 0.00%
CARRYs 210 1728 12.15%
CASCADEs 208 1728 12.04%
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Using default wire table: STD-1
Clock Frequency Report
Clock : Frequency
------------------------------------
clk_in : 50.7 MHz
t_cnt_pulse_0_notri_NOT_clk_in : 74.8 MHz
t_disp/NOT_clk_in : 85.5 MHz
t_qep4_0_notri/NOT_clk_in : 85.5 MHz
t_qep4_1_notri/NOT_clk_in : 77.3 MHz
t_qep4_2_notri/NOT_clk_in : 77.3 MHz
t_qep4_3_notri/NOT_clk_in : 77.3 MHz
t_qep4_4_notri/NOT_clk_in : 85.5 MHz
t_qep4_5_notri/NOT_clk_in : 85.5 MHz
Slack Table at End Points
End points Slack Arrival Required
rise fall rise fall
t_data_bus_notri/reg_data_out_reg(0)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(4)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(7)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(6)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(5)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(3)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(1)/D : n/a 18.08 18.08 n/a n/a
t_data_bus_notri/reg_data_out_reg(2)/D : n/a 18.08 18.08 n/a n/a
ledout_out(5)/ : n/a 18.02 18.02 n/a n/a
ledout_out(3)/ : n/a 17.42 17.42 n/a n/a
Critical Path Report
Critical path #1, (unconstrained path)
NAME GATE ARRIVAL LOAD
----------------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network 0.00 (ideal)
t_data_bus_notri/reg_add_reg(2)/Q DFF 0.00 3.44 up 3.33
t_data_bus_notri/nx204/O F2_CAS 1.50 4.94 up 2.63
cs_out(1)/O F4_LUT 3.84 8.78 up 3.24
nx844/O F4_LUT 2.50 11.28 up 1.90
nx776/O CASCADE2 0.90 12.18 up 1.90
nx846/O F3_LUT 2.50 14.68 up 1.90
nx732/O CASCADE2 0.90 15.58 up 1.90
data_in(3)/O F1_LUT 0.00 15.58 up 1.90
t_data_bus_notri/nx235/O F3_LUT 2.50 18.08 up 1.90
t_data_bus_notri/reg_data_out_reg(3)/D DFF 0.00 18.08 up 0.00
data arrival time 18.08
data required time not specified
----------------------------------------------------------------------------------------------------
data required time not specified
data arrival time 18.08
----------
unconstrained path
----------------------------------------------------------------------------------------------------
Critical path #2, (unconstrained path)
NAME GATE ARRIVAL LOAD
----------------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network 0.00 (ideal)
t_data_bus_notri/reg_add_reg(3)/Q DFF 0.00 3.44 up 3.33
t_data_bus_notri/nx204/O F2_CAS 1.50 4.94 up 2.63
cs_out(1)/O F4_LUT 3.84 8.78 up 3.24
nx852/O F4_LUT 2.50 11.28 up 1.90
nx772/O CASCADE2 0.90 12.18 up 1.90
nx854/O F3_LUT 2.50 14.68 up 1.90
nx730/O CASCADE2 0.90 15.58 up 1.90
data_in(5)/O F1_LUT 0.00 15.58 up 1.90
t_data_bus_notri/nx233/O F3_LUT 2.50 18.08 up 1.90
t_data_bus_notri/reg_data_out_reg(5)/D DFF 0.00 18.08 up 0.00
data arrival time 18.08
data required time not specified
----------------------------------------------------------------------------------------------------
data required time not specified
data arrival time 18.08
----------
unconstrained path
----------------------------------------------------------------------------------------------------
Critical path #3, (unconstrained path)
NAME GATE ARRIVAL LOAD
----------------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network 0.00 (ideal)
t_data_bus_notri/reg_add_reg(2)/Q DFF 0.00 3.44 up 3.33
t_data_bus_notri/nx204/O F2_CAS 1.50 4.94 up 2.63
cs_out(1)/O F4_LUT 3.84 8.78 up 3.24
nx852/O F4_LUT 2.50 11.28 up 1.90
nx772/O CASCADE2 0.90 12.18 up 1.90
nx854/O F3_LUT 2.50 14.68 up 1.90
nx730/O CASCADE2 0.90 15.58 up 1.90
data_in(5)/O F1_LUT 0.00 15.58 up 1.90
t_data_bus_notri/nx233/O F3_LUT 2.50 18.08 up 1.90
t_data_bus_notri/reg_data_out_reg(5)/D DFF 0.00 18.08 up 0.00
data arrival time 18.08
data required time not specified
----------------------------------------------------------------------------------------------------
data required time not specified
data arrival time 18.08
----------
unconstrained path
----------------------------------------------------------------------------------------------------
Critical path #4, (unconstrained path)
NAME GATE ARRIVAL LOAD
----------------------------------------------------------------------------------------------------
clock information not specified
delay thru clock network 0.00 (ideal)
t_data_bus_notri/reg_add_reg(3)/Q DFF 0.00 3.44 up 3.33
t_data_bus_notri/nx204/O F2_CAS 1.50 4.94 up 2.63
cs_out(1)/O F4_LUT 3.84 8.78 up 3.24
nx856/O F4_LUT 2.50 11.28 up 1.90
nx770/O CASCADE2 0.90 12.18 up 1.90
nx858/O F3_LUT 2.50 14.68 up 1.90
nx729/O CASCADE2 0.90 15.58 up 1.90
data_in(6)/O F1_LUT 0.00 15.58 up 1.90
t_data_bus_notri/nx232/O F3_LUT 2.50 18.08 up 1.90
t_data_bus_notri/reg_data_out_reg(6)/D DFF 0.00 18.08 up 0.00
data arrival time 18.08
data required time not specified
----------------------------------------------------------------------------------------------------
data required time not specified
data arrival time 18.08
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