divf.stx

用Verilog HDL 语言编写的播放梁祝的程序

Release 6.3i - xst G.38
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
Compiling source file "divf.v"
Module <divf> compiled
No errors in compilation
Analysis of file <divf.prj> succeeded.
 
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Total memory usage is 48244 kilobytes