divf_divf_test_v_tf.fdo

来自「用Verilog HDL 语言编写的播放梁祝的程序」· FDO 代码 · 共 15 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Wed Jan 11 09:48:53 中国标准时间 2006
##
vlib work
vlog  divf.v
vlog  divf_test.v
vlog  "D:/Program Files/ISE/verilog/src/glbl.v"
vsim -t 1ps  -L xilinxcorelib_ver -L unisims_ver  -lib work divf_divf_test_v_tf glbl
do divf_divf_test_v_tf.udo
view wave
add wave *
view structure
view signals
run 1000ns