step_a.map.eqn
来自「步进的控制电机控制 c++环境下开发」· EQN 代码 · 共 1,318 行 · 第 1/5 页
EQN
1,318 行
--C1_6 is 21mux:65|6
--operation mode is normal
C1_6 = V5_agb_out & Z_F;
--C2_7 is 21mux:66|7
--operation mode is normal
C2_7 = Z_F # !V5_agb_out;
--AB1_cout is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|cout
--operation mode is normal
AB1_cout_carry_eqn = AB1L23;
AB1_cout = !AB1_cout_carry_eqn;
--Z1_dffs[15] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[15]
--operation mode is normal
Z1_dffs[15]_lut_out = AB1_safe_q[15];
Z1_dffs[15] = DFFEA(Z1_dffs[15]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[14] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[14]
--operation mode is normal
Z1_dffs[14]_lut_out = AB1_safe_q[14];
Z1_dffs[14] = DFFEA(Z1_dffs[14]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[13] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[13]
--operation mode is normal
Z1_dffs[13]_lut_out = AB1_safe_q[13];
Z1_dffs[13] = DFFEA(Z1_dffs[13]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[12] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[12]
--operation mode is normal
Z1_dffs[12]_lut_out = AB1_safe_q[12];
Z1_dffs[12] = DFFEA(Z1_dffs[12]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[11] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[11]
--operation mode is normal
Z1_dffs[11]_lut_out = AB1_safe_q[11];
Z1_dffs[11] = DFFEA(Z1_dffs[11]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[10] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[10]
--operation mode is normal
Z1_dffs[10]_lut_out = AB1_safe_q[10];
Z1_dffs[10] = DFFEA(Z1_dffs[10]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[9] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[9]
--operation mode is normal
Z1_dffs[9]_lut_out = AB1_safe_q[9];
Z1_dffs[9] = DFFEA(Z1_dffs[9]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[8] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[8]
--operation mode is normal
Z1_dffs[8]_lut_out = AB1_safe_q[8];
Z1_dffs[8] = DFFEA(Z1_dffs[8]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[7] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[7]
--operation mode is normal
Z1_dffs[7]_lut_out = AB1_safe_q[7];
Z1_dffs[7] = DFFEA(Z1_dffs[7]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[6] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[6]
--operation mode is normal
Z1_dffs[6]_lut_out = AB1_safe_q[6];
Z1_dffs[6] = DFFEA(Z1_dffs[6]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[5] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[5]
--operation mode is normal
Z1_dffs[5]_lut_out = AB1_safe_q[5];
Z1_dffs[5] = DFFEA(Z1_dffs[5]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[4] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[4]
--operation mode is normal
Z1_dffs[4]_lut_out = AB1_safe_q[4];
Z1_dffs[4] = DFFEA(Z1_dffs[4]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[3] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[3]
--operation mode is normal
Z1_dffs[3]_lut_out = AB1_safe_q[3];
Z1_dffs[3] = DFFEA(Z1_dffs[3]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[2] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[2]
--operation mode is normal
Z1_dffs[2]_lut_out = AB1_safe_q[2];
Z1_dffs[2] = DFFEA(Z1_dffs[2]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[1] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[1]
--operation mode is normal
Z1_dffs[1]_lut_out = AB1_safe_q[1];
Z1_dffs[1] = DFFEA(Z1_dffs[1]_lut_out, !W1_Div2CLK, VCC, , , , );
--Z1_dffs[0] is FREQTEST:121|REG:U2|lpm_ff:lpm_ff_component|dffs[0]
--operation mode is normal
Z1_dffs[0]_lut_out = AB1_safe_q[0];
Z1_dffs[0] = DFFEA(Z1_dffs[0]_lut_out, !W1_Div2CLK, VCC, , , , );
--K1_CQ[1] is DECD:136|CQ[1]
--operation mode is normal
K1_CQ[1]_lut_out = !K1_CQ[1];
K1_CQ[1] = DFFEA(K1_CQ[1]_lut_out, D_STP, VCC, , K1_CQ[0], , );
--K1_CQ[0] is DECD:136|CQ[0]
--operation mode is normal
K1_CQ[0]_lut_out = !K1_CQ[0];
K1_CQ[0] = DFFEA(K1_CQ[0]_lut_out, D_STP, VCC, , , , );
--G1_CQ[1] is Dec2:125|CQ[1]
--operation mode is normal
G1_CQ[1]_lut_out = BB1_safe_q[1];
G1_CQ[1] = DFFEA(G1_CQ[1]_lut_out, clk0, VCC, , , , );
--P1L4 is busmux:41|lpm_mux:$00000|mux_6fc:auto_generated|w_result49w~10
--operation mode is normal
P1L4 = V1_agb_out & (S # !G1_CQ[1]) # !V1_agb_out & !S & !G1_CQ[1];
--G1_CQ[0] is Dec2:125|CQ[0]
--operation mode is normal
G1_CQ[0]_lut_out = BB1_safe_q[0];
G1_CQ[0] = DFFEA(G1_CQ[0]_lut_out, clk0, VCC, , , , );
--P1L3 is busmux:41|lpm_mux:$00000|mux_6fc:auto_generated|w_result37w~40
--operation mode is normal
P1L3 = S & V2_agb_out # !S & (G1_CQ[1] $ G1_CQ[0]);
--P1L2 is busmux:41|lpm_mux:$00000|mux_6fc:auto_generated|w_result25w~10
--operation mode is normal
P1L2 = V3_agb_out & (G1_CQ[1] # S) # !V3_agb_out & G1_CQ[1] & !S;
--P1L1 is busmux:41|lpm_mux:$00000|mux_6fc:auto_generated|w_result11w~40
--operation mode is normal
P1L1 = S & V4_agb_out # !S & (G1_CQ[1] $ !G1_CQ[0]);
--A1L6 is altera_internal_jtag~TDO
A1L6 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !M1L51Q);
--A1L7 is altera_internal_jtag~TMSUTAP
A1L7 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !M1L51Q);
--A1L5 is altera_internal_jtag~TCKUTAP
A1L5 = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !M1L51Q);
--altera_internal_jtag is altera_internal_jtag
altera_internal_jtag = STRATIX_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , !M1L51Q);
--V5_lcarry[2] is cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|lcarry[2]
--operation mode is arithmetic
V5_lcarry[2] = CARRY(V5L01 & (!V5_lcarry[1] # !R2_safe_q[3]) # !V5L01 & !R2_safe_q[3] & !V5_lcarry[1]);
--R2_safe_q[4] is CNT5:132|lpm_counter:CQI_rtl_0|cntr_ds6:auto_generated|safe_q[4]
--operation mode is normal
R2_safe_q[4]_carry_eqn = R2L8;
R2_safe_q[4]_lut_out = R2_safe_q[4] $ !R2_safe_q[4]_carry_eqn;
R2_safe_q[4] = DFFEA(R2_safe_q[4]_lut_out, clk5, VCC, , , , );
--V5_agb_out is cmp3:131|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|agb_out
--operation mode is normal
V5_agb_out_carry_eqn = V5_lcarry[2];
V5_agb_out = LCELL(K1_CQ[1] & (V5_agb_out_carry_eqn # !R2_safe_q[4]) # !K1_CQ[1] & V5_agb_out_carry_eqn & !R2_safe_q[4]);
--AB1_safe_q[15] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[15]
--operation mode is arithmetic
AB1_safe_q[15]_carry_eqn = AB1L03;
AB1_safe_q[15]_lut_out = AB1_safe_q[15] $ AB1_safe_q[15]_carry_eqn;
AB1_safe_q[15] = DFFEA(AB1_safe_q[15]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );
--AB1L23 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella15~COUT
--operation mode is arithmetic
AB1L23 = CARRY(!AB1L03 # !AB1_safe_q[15]);
--W1_Div2CLK is FREQTEST:121|TESTCTL:U1|Div2CLK
--operation mode is normal
W1_Div2CLK_lut_out = !W1_Div2CLK;
W1_Div2CLK = DFFEA(W1_Div2CLK_lut_out, F1HZ, VCC, , , , );
--AB1_safe_q[14] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[14]
--operation mode is arithmetic
AB1_safe_q[14]_carry_eqn = AB1L82;
AB1_safe_q[14]_lut_out = AB1_safe_q[14] $ !AB1_safe_q[14]_carry_eqn;
AB1_safe_q[14] = DFFEA(AB1_safe_q[14]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );
--AB1L03 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella14~COUT
--operation mode is arithmetic
AB1L03 = CARRY(AB1_safe_q[14] & !AB1L82);
--AB1_safe_q[13] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[13]
--operation mode is arithmetic
AB1_safe_q[13]_carry_eqn = AB1L62;
AB1_safe_q[13]_lut_out = AB1_safe_q[13] $ AB1_safe_q[13]_carry_eqn;
AB1_safe_q[13] = DFFEA(AB1_safe_q[13]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );
--AB1L82 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella13~COUT
--operation mode is arithmetic
AB1L82 = CARRY(!AB1L62 # !AB1_safe_q[13]);
--AB1_safe_q[12] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[12]
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