step_a.map.eqn

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--operation mode is arithmetic

AB1_safe_q[12]_carry_eqn = AB1L42;
AB1_safe_q[12]_lut_out = AB1_safe_q[12] $ !AB1_safe_q[12]_carry_eqn;
AB1_safe_q[12] = DFFEA(AB1_safe_q[12]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L62 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella12~COUT
--operation mode is arithmetic

AB1L62 = CARRY(AB1_safe_q[12] & !AB1L42);


--AB1_safe_q[11] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[11]
--operation mode is arithmetic

AB1_safe_q[11]_carry_eqn = AB1L22;
AB1_safe_q[11]_lut_out = AB1_safe_q[11] $ AB1_safe_q[11]_carry_eqn;
AB1_safe_q[11] = DFFEA(AB1_safe_q[11]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L42 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella11~COUT
--operation mode is arithmetic

AB1L42 = CARRY(!AB1L22 # !AB1_safe_q[11]);


--AB1_safe_q[10] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[10]
--operation mode is arithmetic

AB1_safe_q[10]_carry_eqn = AB1L02;
AB1_safe_q[10]_lut_out = AB1_safe_q[10] $ !AB1_safe_q[10]_carry_eqn;
AB1_safe_q[10] = DFFEA(AB1_safe_q[10]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L22 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella10~COUT
--operation mode is arithmetic

AB1L22 = CARRY(AB1_safe_q[10] & !AB1L02);


--AB1_safe_q[9] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[9]
--operation mode is arithmetic

AB1_safe_q[9]_carry_eqn = AB1L81;
AB1_safe_q[9]_lut_out = AB1_safe_q[9] $ AB1_safe_q[9]_carry_eqn;
AB1_safe_q[9] = DFFEA(AB1_safe_q[9]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L02 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella9~COUT
--operation mode is arithmetic

AB1L02 = CARRY(!AB1L81 # !AB1_safe_q[9]);


--AB1_safe_q[8] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[8]
--operation mode is arithmetic

AB1_safe_q[8]_carry_eqn = AB1L61;
AB1_safe_q[8]_lut_out = AB1_safe_q[8] $ !AB1_safe_q[8]_carry_eqn;
AB1_safe_q[8] = DFFEA(AB1_safe_q[8]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L81 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella8~COUT
--operation mode is arithmetic

AB1L81 = CARRY(AB1_safe_q[8] & !AB1L61);


--AB1_safe_q[7] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[7]
--operation mode is arithmetic

AB1_safe_q[7]_carry_eqn = AB1L41;
AB1_safe_q[7]_lut_out = AB1_safe_q[7] $ AB1_safe_q[7]_carry_eqn;
AB1_safe_q[7] = DFFEA(AB1_safe_q[7]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L61 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella7~COUT
--operation mode is arithmetic

AB1L61 = CARRY(!AB1L41 # !AB1_safe_q[7]);


--AB1_safe_q[6] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[6]
--operation mode is arithmetic

AB1_safe_q[6]_carry_eqn = AB1L21;
AB1_safe_q[6]_lut_out = AB1_safe_q[6] $ !AB1_safe_q[6]_carry_eqn;
AB1_safe_q[6] = DFFEA(AB1_safe_q[6]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L41 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella6~COUT
--operation mode is arithmetic

AB1L41 = CARRY(AB1_safe_q[6] & !AB1L21);


--AB1_safe_q[5] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[5]
--operation mode is arithmetic

AB1_safe_q[5]_carry_eqn = AB1L01;
AB1_safe_q[5]_lut_out = AB1_safe_q[5] $ AB1_safe_q[5]_carry_eqn;
AB1_safe_q[5] = DFFEA(AB1_safe_q[5]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L21 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella5~COUT
--operation mode is arithmetic

AB1L21 = CARRY(!AB1L01 # !AB1_safe_q[5]);


--AB1_safe_q[4] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[4]
--operation mode is arithmetic

AB1_safe_q[4]_carry_eqn = AB1L8;
AB1_safe_q[4]_lut_out = AB1_safe_q[4] $ !AB1_safe_q[4]_carry_eqn;
AB1_safe_q[4] = DFFEA(AB1_safe_q[4]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L01 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella4~COUT
--operation mode is arithmetic

AB1L01 = CARRY(AB1_safe_q[4] & !AB1L8);


--AB1_safe_q[3] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[3]
--operation mode is arithmetic

AB1_safe_q[3]_carry_eqn = AB1L6;
AB1_safe_q[3]_lut_out = AB1_safe_q[3] $ AB1_safe_q[3]_carry_eqn;
AB1_safe_q[3] = DFFEA(AB1_safe_q[3]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L8 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella3~COUT
--operation mode is arithmetic

AB1L8 = CARRY(!AB1L6 # !AB1_safe_q[3]);


--AB1_safe_q[2] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[2]
--operation mode is arithmetic

AB1_safe_q[2]_carry_eqn = AB1L4;
AB1_safe_q[2]_lut_out = AB1_safe_q[2] $ !AB1_safe_q[2]_carry_eqn;
AB1_safe_q[2] = DFFEA(AB1_safe_q[2]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L6 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella2~COUT
--operation mode is arithmetic

AB1L6 = CARRY(AB1_safe_q[2] & !AB1L4);


--AB1_safe_q[1] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[1]
--operation mode is arithmetic

AB1_safe_q[1]_carry_eqn = AB1L2;
AB1_safe_q[1]_lut_out = AB1_safe_q[1] $ AB1_safe_q[1]_carry_eqn;
AB1_safe_q[1] = DFFEA(AB1_safe_q[1]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L4 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

AB1L4 = CARRY(!AB1L2 # !AB1_safe_q[1]);


--AB1_safe_q[0] is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|safe_q[0]
--operation mode is arithmetic

AB1_safe_q[0]_lut_out = !AB1_safe_q[0];
AB1_safe_q[0] = DFFEA(AB1_safe_q[0]_lut_out, CNTT, !W1_CLR_CNT, , W1_Div2CLK, , );

--AB1L2 is FREQTEST:121|CNT:U3|lpm_counter:lpm_counter_component|cntr_8f8:auto_generated|counter_cella0~COUT
--operation mode is arithmetic

AB1L2 = CARRY(AB1_safe_q[0]);


--V1_lcarry[2] is cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|lcarry[2]
--operation mode is arithmetic

V1_lcarry[2] = CARRY(EB1_q_a[14] & (!V1_lcarry[1] # !R1_safe_q[3]) # !EB1_q_a[14] & !R1_safe_q[3] & !V1_lcarry[1]);


--EB1_q_a[15] is rom3:inst|altsyncram:altsyncram_component|altsyncram_0fs:auto_generated|altsyncram_s6a2:altsyncram1|q_a[15]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 16, Port B Logical Depth: 32, Port B Logical Width: 16
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
EB1_q_a[15]_PORT_A_data_in = VCC;
EB1_q_a[15]_PORT_A_data_in_reg = DFFE(EB1_q_a[15]_PORT_A_data_in, EB1_q_a[15]_clock_0, , , );
EB1_q_a[15]_PORT_B_data_in = FB1_ram_rom_data_reg[15];
EB1_q_a[15]_PORT_B_data_in_reg = DFFE(EB1_q_a[15]_PORT_B_data_in, EB1_q_a[15]_clock_1, , , );
EB1_q_a[15]_PORT_A_address = BUS(BB1_safe_q[0], BB1_safe_q[1], BB1_safe_q[2], BB1_safe_q[3], BB1_safe_q[4]);
EB1_q_a[15]_PORT_A_address_reg = DFFE(EB1_q_a[15]_PORT_A_address, EB1_q_a[15]_clock_0, , , );
EB1_q_a[15]_PORT_B_address = BUS(HB1_safe_q[0], HB1_safe_q[1], HB1_safe_q[2], HB1_safe_q[3], HB1_safe_q[4]);
EB1_q_a[15]_PORT_B_address_reg = DFFE(EB1_q_a[15]_PORT_B_address, EB1_q_a[15]_clock_1, , , );
EB1_q_a[15]_PORT_A_write_enable = GND;
EB1_q_a[15]_PORT_A_write_enable_reg = DFFE(EB1_q_a[15]_PORT_A_write_enable, EB1_q_a[15]_clock_0, , , );
EB1_q_a[15]_PORT_B_write_enable = FB1L63;
EB1_q_a[15]_PORT_B_write_enable_reg = DFFE(EB1_q_a[15]_PORT_B_write_enable, EB1_q_a[15]_clock_1, , , );
EB1_q_a[15]_clock_0 = clk0;
EB1_q_a[15]_clock_1 = A1L5;
EB1_q_a[15]_PORT_A_data_out = MEMORY(EB1_q_a[15]_PORT_A_data_in_reg, EB1_q_a[15]_PORT_B_data_in_reg, EB1_q_a[15]_PORT_A_address_reg, EB1_q_a[15]_PORT_B_address_reg, EB1_q_a[15]_PORT_A_write_enable_reg, EB1_q_a[15]_PORT_B_write_enable_reg, , , EB1_q_a[15]_clock_0, EB1_q_a[15]_clock_1, , , , );
EB1_q_a[15] = EB1_q_a[15]_PORT_A_data_out[0];

--EB1_q_b[15] is rom3:inst|altsyncram:altsyncram_component|altsyncram_0fs:auto_generated|altsyncram_s6a2:altsyncram1|q_b[15]
EB1_q_b[15]_PORT_A_data_in = VCC;
EB1_q_b[15]_PORT_A_data_in_reg = DFFE(EB1_q_b[15]_PORT_A_data_in, EB1_q_b[15]_clock_0, , , );
EB1_q_b[15]_PORT_B_data_in = FB1_ram_rom_data_reg[15];
EB1_q_b[15]_PORT_B_data_in_reg = DFFE(EB1_q_b[15]_PORT_B_data_in, EB1_q_b[15]_clock_1, , , );
EB1_q_b[15]_PORT_A_address = BUS(BB1_safe_q[0], BB1_safe_q[1], BB1_safe_q[2], BB1_safe_q[3], BB1_safe_q[4]);
EB1_q_b[15]_PORT_A_address_reg = DFFE(EB1_q_b[15]_PORT_A_address, EB1_q_b[15]_clock_0, , , );
EB1_q_b[15]_PORT_B_address = BUS(HB1_safe_q[0], HB1_safe_q[1], HB1_safe_q[2], HB1_safe_q[3], HB1_safe_q[4]);
EB1_q_b[15]_PORT_B_address_reg = DFFE(EB1_q_b[15]_PORT_B_address, EB1_q_b[15]_clock_1, , , );
EB1_q_b[15]_PORT_A_write_enable = GND;
EB1_q_b[15]_PORT_A_write_enable_reg = DFFE(EB1_q_b[15]_PORT_A_write_enable, EB1_q_b[15]_clock_0, , , );
EB1_q_b[15]_PORT_B_write_enable = FB1L63;
EB1_q_b[15]_PORT_B_write_enable_reg = DFFE(EB1_q_b[15]_PORT_B_write_enable, EB1_q_b[15]_clock_1, , , );
EB1_q_b[15]_clock_0 = clk0;
EB1_q_b[15]_clock_1 = A1L5;
EB1_q_b[15]_PORT_B_data_out = MEMORY(EB1_q_b[15]_PORT_A_data_in_reg, EB1_q_b[15]_PORT_B_data_in_reg, EB1_q_b[15]_PORT_A_address_reg, EB1_q_b[15]_PORT_B_address_reg, EB1_q_b[15]_PORT_A_write_enable_reg, EB1_q_b[15]_PORT_B_write_enable_reg, , , EB1_q_b[15]_clock_0, EB1_q_b[15]_clock_1, , , , );
EB1_q_b[15] = EB1_q_b[15]_PORT_B_data_out[0];


--R1_safe_q[4] is CNT8:83|lpm_counter:CQI_rtl_1|cntr_ds6:auto_generated|safe_q[4]
--operation mode is normal

R1_safe_q[4]_carry_eqn = R1L8;
R1_safe_q[4]_lut_out = R1_safe_q[4] $ !R1_safe_q[4]_carry_eqn;
R1_safe_q[4] = DFFEA(R1_safe_q[4]_lut_out, clk5, VCC, , , , );


--V1_agb_out is cmp3:93|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|agb_out
--operation mode is normal

V1_agb_out_carry_eqn = V1_lcarry[2];
V1_agb_out = LCELL(EB1_q_a[15] & (V1_agb_out_carry_eqn # !R1_safe_q[4]) # !EB1_q_a[15] & V1_agb_out_carry_eqn & !R1_safe_q[4]);


--BB1_safe_q[1] is CNT24:127|lpm_counter:CQI_rtl_2|cntr_rq5:auto_generated|safe_q[1]
--operation mode is arithmetic

BB1_safe_q[1]_carry_eqn = BB1L2;
BB1_safe_q[1]_lut_out = BB1_safe_q[1] $ BB1_safe_q[1]_carry_eqn;
BB1_safe_q[1] = DFFEA(BB1_safe_q[1]_lut_out, clk0, VCC, , , , );

--BB1L4 is CNT24:127|lpm_counter:CQI_rtl_2|cntr_rq5:auto_generated|counter_cella1~COUT
--operation mode is arithmetic

BB1L4 = CARRY(BB1_safe_q[1] $ u_d # !BB1L2);


--V2_lcarry[2] is cmp3:94|lpm_compare:1|comptree:comparator|cmpchain:cmp_end|lcarry[2]
--operation mode is arithmetic

V2_lcarry[2] = CARRY(EB1_q_a[10] & (!V2_lcarry[1] # !R1_safe_q[3]) # !EB1_q_a[10] & !R1_safe_q[3] & !V2_lcarry[1]);


--EB1_q_a[11] is rom3:inst|altsyncram:altsyncram_component|altsyncram_0fs:auto_generated|altsyncram_s6a2:altsyncram1|q_a[11]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 16, Port B Logical Depth: 32, Port B Logical Width: 16
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
EB1_q_a[11]_PORT_A_data_in = VCC;
EB1_q_a[11]_PORT_A_data_in_reg = DFFE(EB1_q_a[11]_PORT_A_data_in, EB1_q_a[11]_clock_0, , , );
EB1_q_a[11]_PORT_B_data_in = FB1_ram_rom_data_reg[11];
EB1_q_a[11]_PORT_B_data_in_reg = DFFE(EB1_q_a[11]_PORT_B_data_in, EB1_q_a[11]_clock_1, , , );
EB1_q_a[11]_PORT_A_address = BUS(BB1_safe_q[0], BB1_safe_q[1], BB1_safe_q[2], BB1_safe_q[3], BB1_safe_q[4]);
EB1_q_a[11]_PORT_A_address_reg = DFFE(EB1_q_a[11]_PORT_A_address, EB1_q_a[11]_clock_0, , , );
EB1_q_a[11]_PORT_B_address = BUS(HB1_safe_q[0], HB1_safe_q[1], HB1_safe_q[2], HB1_safe_q[3], HB1_safe_q[4]);
EB1_q_a[11]_PORT_B_address_reg = DFFE(EB1_q_a[11]_PORT_B_address, EB1_q_a[11]_clock_1, , , );
EB1_q_a[11]_PORT_A_write_enable = GND;
EB1_q_a[11]_PORT_A_write_enable_reg = DFFE(EB1_q_a[11]_PORT_A_write_enable, EB1_q_a[11]_clock_0, , , );
EB1_q_a[11]_PORT_B_write_enable = FB1L63;