hamgen.v

各种基本单元的verilog模块.对初学者很有帮助的.

/*********************************************************/
// MODULE:         Hamming Code Generator
//                 for 8-bit data
//
// FILE NAME:      hamgen.v
// VERSION:        1.0
// DATE:           Mon Oct 19 07:42:31 1998
// AUTHOR:         HAMGEN.EXE
//
// CODE TYPE:      Register Transfer Level
//
// DESCRIPTION:    This module defines a generator of codes
// for detecting and correcting single bit data errors.
//
/*********************************************************/

// DEFINES
`define DEL	1		// Clock-to-output delay. Zero
                    // time delays can be confusing
                    // and sometimes cause problems.

// TOP MODULE
module HamGen(
        data_in,
        edc_out);

// INPUTS
input [7:0]     data_in;    // Input data

// OUTPUTS
output [3:0]    edc_out;    // EDC output

// INOUTS

// SIGNAL DECLARATIONS
wire [7:0]      data_in;
wire [3:0]      edc_out;

// PARAMETERS

// ASSIGN STATEMENTS
assign #`DEL edc_out[3] = data_in[7] ^ data_in[6] ^ data_in[4] ^ data_in[3] ^ data_in[1];
assign #`DEL edc_out[2] = data_in[7] ^ data_in[5] ^ data_in[4] ^ data_in[2] ^ data_in[1];
assign #`DEL edc_out[1] = data_in[6] ^ data_in[5] ^ data_in[4] ^ data_in[0];
assign #`DEL edc_out[0] = data_in[3] ^ data_in[2] ^ data_in[1] ^ data_in[0];

// MAIN CODE

endmodule       // HamGen