mono2.v

来自「各种基本单元的verilog模块.对初学者很有帮助的.」· Verilog 代码 · 共 35 行

//
// Any change of retrig restarts the one-shot for 250 time units.
//
module one_shot(
	q,
	retrig);

output		q;
input		retrig;

reg 		q;				// one-shot output
wire		retrig;			// control input

reg  [63:0]	retrig_time;	// time of the most recent change
							// of the retrig input
wire [63:0]	delay_time;		// retrig_time delayed by 250
							// time units

assign #250 delay_time = retrig_time;

always @(retrig) begin
	retrig_time = $time;  	// save the time of the most
						  	// recent change of retrig
	q = 1;				  	// set the output high
end

always @(delay_time) begin
	// if this is true, the last change of retrig
	// was exactly 250 time units ago, so trigger
	// the one shot
	if (retrig_time == delay_time)
		q = 0;
end
endmodule		// one_shot