counter_7seg.map.eqn

带分频器的bcd计数电路设计

--operation mode is normal

B1_count1[14]_lut_out = B1L84 & B1L68;
B1_count1[14] = DFFEAS(B1_count1[14]_lut_out, clk, VCC, , , , , , );


--B1L28 is f50MHz_to_1Hz:inst|reduce_nor~169
--operation mode is normal

B1L28 = B1_count1[13] # B1_count1[12] # !B1_count1[14] # !B1L15Q;


--B1_count1[11] is f50MHz_to_1Hz:inst|count1[11]
--operation mode is normal

B1_count1[11]_lut_out = B1L24;
B1_count1[11] = DFFEAS(B1_count1[11]_lut_out, clk, VCC, , , , , , );


--B1_count1[10] is f50MHz_to_1Hz:inst|count1[10]
--operation mode is normal

B1_count1[10]_lut_out = B1L04;
B1_count1[10] = DFFEAS(B1_count1[10]_lut_out, clk, VCC, , , , , , );


--B1_count1[9] is f50MHz_to_1Hz:inst|count1[9]
--operation mode is normal

B1_count1[9]_lut_out = B1L83 & B1L68;
B1_count1[9] = DFFEAS(B1_count1[9]_lut_out, clk, VCC, , , , , , );


--B1_count1[8] is f50MHz_to_1Hz:inst|count1[8]
--operation mode is normal

B1_count1[8]_lut_out = B1L63 & B1L68;
B1_count1[8] = DFFEAS(B1_count1[8]_lut_out, clk, VCC, , , , , , );


--B1L38 is f50MHz_to_1Hz:inst|reduce_nor~170
--operation mode is normal

B1L38 = B1_count1[11] # B1_count1[10] # !B1_count1[8] # !B1_count1[9];


--B1_count1[7] is f50MHz_to_1Hz:inst|count1[7]
--operation mode is normal

B1_count1[7]_lut_out = B1L43;
B1_count1[7] = DFFEAS(B1_count1[7]_lut_out, clk, VCC, , , , , , );


--B1_count1[5] is f50MHz_to_1Hz:inst|count1[5]
--operation mode is normal

B1_count1[5]_lut_out = B1L03;
B1_count1[5] = DFFEAS(B1_count1[5]_lut_out, clk, VCC, , , , , , );


--B1_count1[4] is f50MHz_to_1Hz:inst|count1[4]
--operation mode is normal

B1_count1[4]_lut_out = B1L82 & B1L68;
B1_count1[4] = DFFEAS(B1_count1[4]_lut_out, clk, VCC, , , , , , );


--B1_count1[6] is f50MHz_to_1Hz:inst|count1[6]
--operation mode is normal

B1_count1[6]_lut_out = B1L23 & B1L68;
B1_count1[6] = DFFEAS(B1_count1[6]_lut_out, clk, VCC, , , , , , );


--B1L48 is f50MHz_to_1Hz:inst|reduce_nor~171
--operation mode is normal

B1L48 = B1_count1[7] # B1_count1[5] # B1_count1[4] # !B1_count1[6];


--B1_count1[3] is f50MHz_to_1Hz:inst|count1[3]
--operation mode is normal

B1_count1[3]_lut_out = B1L62;
B1_count1[3] = DFFEAS(B1_count1[3]_lut_out, clk, VCC, , , , , , );


--B1_count1[2] is f50MHz_to_1Hz:inst|count1[2]
--operation mode is normal

B1_count1[2]_lut_out = B1L42;
B1_count1[2] = DFFEAS(B1_count1[2]_lut_out, clk, VCC, , , , , , );


--B1_count1[1] is f50MHz_to_1Hz:inst|count1[1]
--operation mode is normal

B1_count1[1]_lut_out = B1L22;
B1_count1[1] = DFFEAS(B1_count1[1]_lut_out, clk, VCC, , , , , , );


--B1_count1[0] is f50MHz_to_1Hz:inst|count1[0]
--operation mode is normal

B1_count1[0]_lut_out = B1L02;
B1_count1[0] = DFFEAS(B1_count1[0]_lut_out, clk, VCC, , , , , , );


--B1L58 is f50MHz_to_1Hz:inst|reduce_nor~172
--operation mode is normal

B1L58 = !B1_count1[0] # !B1_count1[1] # !B1_count1[2] # !B1_count1[3];


--B1L68 is f50MHz_to_1Hz:inst|reduce_nor~173
--operation mode is normal

B1L68 = B1L28 # B1L38 # B1L48 # B1L58;


--B1L84 is f50MHz_to_1Hz:inst|add~286
--operation mode is arithmetic

B1L84_carry_eqn = B1L74;
B1L84 = B1_count1[14] $ (!B1L84_carry_eqn);

--B1L94 is f50MHz_to_1Hz:inst|add~286COUT
--operation mode is arithmetic

B1L94 = CARRY(B1_count1[14] & !B1L74);


--B1L64 is f50MHz_to_1Hz:inst|add~285
--operation mode is arithmetic

B1L64_carry_eqn = B1L54;
B1L64 = B1_count1[13] $ (B1L64_carry_eqn);

--B1L74 is f50MHz_to_1Hz:inst|add~285COUT
--operation mode is arithmetic

B1L74 = CARRY(!B1L54 # !B1_count1[13]);


--B1L44 is f50MHz_to_1Hz:inst|add~284
--operation mode is arithmetic

B1L44_carry_eqn = B1L34;
B1L44 = B1_count1[12] $ (!B1L44_carry_eqn);

--B1L54 is f50MHz_to_1Hz:inst|add~284COUT
--operation mode is arithmetic

B1L54 = CARRY(B1_count1[12] & !B1L34);


--B1L24 is f50MHz_to_1Hz:inst|add~283
--operation mode is arithmetic

B1L24_carry_eqn = B1L14;
B1L24 = B1_count1[11] $ (B1L24_carry_eqn);

--B1L34 is f50MHz_to_1Hz:inst|add~283COUT
--operation mode is arithmetic

B1L34 = CARRY(!B1L14 # !B1_count1[11]);


--B1L04 is f50MHz_to_1Hz:inst|add~282
--operation mode is arithmetic

B1L04_carry_eqn = B1L93;
B1L04 = B1_count1[10] $ (!B1L04_carry_eqn);

--B1L14 is f50MHz_to_1Hz:inst|add~282COUT
--operation mode is arithmetic

B1L14 = CARRY(B1_count1[10] & !B1L93);


--B1L83 is f50MHz_to_1Hz:inst|add~281
--operation mode is arithmetic

B1L83_carry_eqn = B1L73;
B1L83 = B1_count1[9] $ (B1L83_carry_eqn);

--B1L93 is f50MHz_to_1Hz:inst|add~281COUT
--operation mode is arithmetic

B1L93 = CARRY(!B1L73 # !B1_count1[9]);


--B1L63 is f50MHz_to_1Hz:inst|add~280
--operation mode is arithmetic

B1L63_carry_eqn = B1L53;
B1L63 = B1_count1[8] $ (!B1L63_carry_eqn);

--B1L73 is f50MHz_to_1Hz:inst|add~280COUT
--operation mode is arithmetic

B1L73 = CARRY(B1_count1[8] & !B1L53);


--B1L43 is f50MHz_to_1Hz:inst|add~279
--operation mode is arithmetic

B1L43_carry_eqn = B1L33;
B1L43 = B1_count1[7] $ (B1L43_carry_eqn);

--B1L53 is f50MHz_to_1Hz:inst|add~279COUT
--operation mode is arithmetic

B1L53 = CARRY(!B1L33 # !B1_count1[7]);


--B1L03 is f50MHz_to_1Hz:inst|add~277
--operation mode is arithmetic

B1L03_carry_eqn = B1L92;
B1L03 = B1_count1[5] $ (B1L03_carry_eqn);

--B1L13 is f50MHz_to_1Hz:inst|add~277COUT
--operation mode is arithmetic

B1L13 = CARRY(!B1L92 # !B1_count1[5]);


--B1L82 is f50MHz_to_1Hz:inst|add~276
--operation mode is arithmetic

B1L82_carry_eqn = B1L72;
B1L82 = B1_count1[4] $ (!B1L82_carry_eqn);

--B1L92 is f50MHz_to_1Hz:inst|add~276COUT
--operation mode is arithmetic

B1L92 = CARRY(B1_count1[4] & !B1L72);


--B1L23 is f50MHz_to_1Hz:inst|add~278
--operation mode is arithmetic

B1L23_carry_eqn = B1L13;
B1L23 = B1_count1[6] $ (!B1L23_carry_eqn);

--B1L33 is f50MHz_to_1Hz:inst|add~278COUT
--operation mode is arithmetic

B1L33 = CARRY(B1_count1[6] & !B1L13);


--B1L62 is f50MHz_to_1Hz:inst|add~275
--operation mode is arithmetic

B1L62_carry_eqn = B1L52;
B1L62 = B1_count1[3] $ (B1L62_carry_eqn);

--B1L72 is f50MHz_to_1Hz:inst|add~275COUT
--operation mode is arithmetic

B1L72 = CARRY(!B1L52 # !B1_count1[3]);


--B1L42 is f50MHz_to_1Hz:inst|add~274
--operation mode is arithmetic

B1L42_carry_eqn = B1L32;
B1L42 = B1_count1[2] $ (!B1L42_carry_eqn);

--B1L52 is f50MHz_to_1Hz:inst|add~274COUT
--operation mode is arithmetic

B1L52 = CARRY(B1_count1[2] & !B1L32);


--B1L22 is f50MHz_to_1Hz:inst|add~273
--operation mode is arithmetic

B1L22_carry_eqn = B1L12;
B1L22 = B1_count1[1] $ (B1L22_carry_eqn);

--B1L32 is f50MHz_to_1Hz:inst|add~273COUT
--operation mode is arithmetic

B1L32 = CARRY(!B1L12 # !B1_count1[1]);


--B1L02 is f50MHz_to_1Hz:inst|add~272
--operation mode is arithmetic

B1L02 = !B1_count1[0];

--B1L12 is f50MHz_to_1Hz:inst|add~272COUT
--operation mode is arithmetic

B1L12 = CARRY(B1_count1[0]);


--clr is clr
--operation mode is input

clr = INPUT();


--clk is clk
--operation mode is input

clk = INPUT();


--cn is cn
--operation mode is output

cn = OUTPUT(C1_cn);


--high[6] is high[6]
--operation mode is output

high[6] = OUTPUT(D1L7);


--high[5] is high[5]
--operation mode is output

high[5] = OUTPUT(D1L6);


--high[4] is high[4]
--operation mode is output

high[4] = OUTPUT(D1L5);


--high[3] is high[3]
--operation mode is output

high[3] = OUTPUT(D1L1);


--high[2] is high[2]
--operation mode is output

high[2] = OUTPUT(D1L2);


--high[1] is high[1]
--operation mode is output

high[1] = OUTPUT(D1L3);


--high[0] is high[0]
--operation mode is output

high[0] = OUTPUT(!D1L4);


--low[6] is low[6]
--operation mode is output

low[6] = OUTPUT(D2L7);


--low[5] is low[5]
--operation mode is output

low[5] = OUTPUT(D2L6);


--low[4] is low[4]
--operation mode is output

low[4] = OUTPUT(D2L5);


--low[3] is low[3]
--operation mode is output

low[3] = OUTPUT(D2L1);


--low[2] is low[2]
--operation mode is output

low[2] = OUTPUT(D2L2);


--low[1] is low[1]
--operation mode is output

low[1] = OUTPUT(D2L3);


--low[0] is low[0]
--operation mode is output

low[0] = OUTPUT(!D2L4);