vsr_4_3_rx_aligner.v

甚短距离互联（Veryshort reach VSR）协议编成实现

/////////////////////////////////////////////////////////////////////
////                                                             ////
////  vsr_4_03	word aligner			                 ////
////                                                             ////
////  Author: liyu	                                         ////
////          [e-mail]                              ////
////          		                                         ////
////                                                             ////
/////////////////////////////////////////////////////////////////////
////                                                             ////
//// Copyright (C) 2004 liyu                        		 ////
////                    [e-mail]                    ////
////                                                             ////
//// This source file may be used and distributed without        ////
//// restriction provided that this copyright statement is not   ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer.////
////                                                             ////
////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
//// POSSIBILITY OF SUCH DAMAGE.                                 ////
////                                                             ////
/////////////////////////////////////////////////////////////////////

//synopsys translate_off
`include "timescale.v"
//synopsys translate_on

module vsr_4_3_rx_aligner(din,dout,load,rst,clk,done);
input	[15:0]	din;
output	[15:0]	dout;
input		clk,rst;
input		load;
output		done;

reg	[14:0]	db;
reg	[14:0]	dx;
reg	[14:0]	dl;
reg	lock;
wire	[3:0]	sel;

always@(posedge clk or posedge rst)
begin
	if (rst) begin
		db<=15'b0;
		dx<=15'b0;
		dl<=15'b0;
	end	
	else begin
		db<=din;
		dx<=din^db;
		if (!lock)
			dl<=dx;
	end	
end	

wire		jpg;
wire		set;

always@(posedge clk or posedge rst)
begin
	if (rst) begin
		lock<=1'b0;
	end	
	else begin
		if (load) begin
			lock<=1'b0;
		end	
		else if (!jpg&&set)
			lock<=1'b1;
	end		
end	
vsr_4_3_pattern_compare comp1(.din(dx[3:0]),.dout(jpg));
defparam		comp1.WIDTH=4,
			comp1.KEY=4'b0000;
				
vsr_4_3_pattern_conut  		pattern_counter(.dout(set),.clk(clk),.rst(rst),.jpg(jpg),.load(load));
vsr_4_3_rx_data_path		shifter(.din(din),.dout(dout),.clk(clk),.sel(sel));
vsr_4_3_rx_binary_search	binary_search(.din(dl),.sel(sel),.clk(clk),.rst(rst));

assign		done=lock;
endmodule