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📄 signal.map.eqn

📁 一个简单的多种信号的发生器 包括正玄
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--G1_q[4] is signal5:inst10|q[4]
--operation mode is arithmetic

G1_q[4]_carry_eqn = G1L74;
G1_q[4]_lut_out = G1_q[4] $ (!G1_q[4]_carry_eqn);
G1_q[4] = DFFEAS(G1_q[4]_lut_out, clk, VCC, , , , , , );

--G1L94 is signal5:inst10|q[4]~68
--operation mode is arithmetic

G1L94 = CARRY(G1_q[4] & (!G1L74));


--G1_q[5] is signal5:inst10|q[5]
--operation mode is normal

G1_q[5]_carry_eqn = G1L94;
G1_q[5]_lut_out = G1_q[5] $ (G1_q[5]_carry_eqn);
G1_q[5] = DFFEAS(G1_q[5]_lut_out, clk, VCC, , , , , , );


--E1_tmp[7] is signal3:inst2|tmp[7]
--operation mode is normal

E1_tmp[7]_carry_eqn = E1L51;
E1_tmp[7]_lut_out = E1_tmp[7] $ (!E1_tmp[7]_carry_eqn);
E1_tmp[7] = DFFEAS(E1_tmp[7]_lut_out, clk, VCC, , , VCC, !reset, , );


--D1_tmp[7] is signal2:inst1|tmp[7]
--operation mode is normal

D1_tmp[7]_carry_eqn = D1L31;
D1_tmp[7]_lut_out = D1_tmp[7] $ (!D1_tmp[7]_carry_eqn);
D1_tmp[7] = DFFEAS(D1_tmp[7]_lut_out, clk, reset, , , , , , );


--C1_tmp[7] is signal1:inst|tmp[7]
--operation mode is normal

C1_tmp[7]_carry_eqn = C1L42;
C1_tmp[7]_lut_out = C1_a $ C1_tmp[7] $ !C1_tmp[7]_carry_eqn;
C1_tmp[7] = DFFEAS(C1_tmp[7]_lut_out, clk, reset, , , C1L2, , , C1L61);


--B2L1 is selectsignal:inst7|Mux~517
--operation mode is normal

B2L1 = sel[1] & (sel[0]) # !sel[1] & (sel[0] & D1_tmp[7] # !sel[0] & (C1_tmp[7]));


--F1_tmp[7] is signal4:inst3|tmp[7]
--operation mode is normal

F1_tmp[7]_lut_out = !F1_tmp[7];
F1_tmp[7] = DFFEAS(F1_tmp[7]_lut_out, clk, reset, , F1L1, , , , );


--B2L2 is selectsignal:inst7|Mux~518
--operation mode is normal

B2L2 = sel[1] & (B2L1 & (F1_tmp[7]) # !B2L1 & E1_tmp[7]) # !sel[1] & (B2L1);


--B2L3 is selectsignal:inst7|Mux~519
--operation mode is normal

B2L3 = sel[2] & (G1_q[4] $ !G1_q[5]) # !sel[2] & (B2L2);


--B2L4 is selectsignal:inst7|Mux~520
--operation mode is normal

B2L4 = !sel[1] & !sel[0] # !sel[2];


--B2_q[7] is selectsignal:inst7|q[7]
--operation mode is normal

B2_q[7] = B2L4 & B2L3 # !B2L4 & (B2_q[7]);


--F1_tmp[6] is signal4:inst3|tmp[6]
--operation mode is normal

F1_tmp[6]_lut_out = !F1_tmp[6];
F1_tmp[6] = DFFEAS(F1_tmp[6]_lut_out, clk, reset, , F1L2, , , , );


--E1_tmp[6] is signal3:inst2|tmp[6]
--operation mode is arithmetic

E1_tmp[6]_carry_eqn = E1L31;
E1_tmp[6]_lut_out = E1_tmp[6] $ (E1_tmp[6]_carry_eqn);
E1_tmp[6] = DFFEAS(E1_tmp[6]_lut_out, clk, VCC, , , VCC, !reset, , );

--E1L51 is signal3:inst2|tmp[6]~77
--operation mode is arithmetic

E1L51 = CARRY(E1_tmp[6] # !E1L31);


--B2L5 is selectsignal:inst7|Mux~521
--operation mode is normal

B2L5 = sel[1] # sel[0];


--G1_q[3] is signal5:inst10|q[3]
--operation mode is arithmetic

G1_q[3]_carry_eqn = G1L54;
G1_q[3]_lut_out = G1_q[3] $ (G1_q[3]_carry_eqn);
G1_q[3] = DFFEAS(G1_q[3]_lut_out, clk, VCC, , , , , , );

--G1L74 is signal5:inst10|q[3]~76
--operation mode is arithmetic

G1L74 = CARRY(!G1L54 # !G1_q[3]);


--G1_q[1] is signal5:inst10|q[1]
--operation mode is arithmetic

G1_q[1]_carry_eqn = G1L14;
G1_q[1]_lut_out = G1_q[1] $ (G1_q[1]_carry_eqn);
G1_q[1] = DFFEAS(G1_q[1]_lut_out, clk, VCC, , , , , , );

--G1L34 is signal5:inst10|q[1]~80
--operation mode is arithmetic

G1L34 = CARRY(!G1L14 # !G1_q[1]);


--G1_q[2] is signal5:inst10|q[2]
--operation mode is arithmetic

G1_q[2]_carry_eqn = G1L34;
G1_q[2]_lut_out = G1_q[2] $ (!G1_q[2]_carry_eqn);
G1_q[2] = DFFEAS(G1_q[2]_lut_out, clk, VCC, , , , , , );

--G1L54 is signal5:inst10|q[2]~84
--operation mode is arithmetic

G1L54 = CARRY(G1_q[2] & (!G1L34));


--G1_q[0] is signal5:inst10|q[0]
--operation mode is arithmetic

G1_q[0]_lut_out = !G1_q[0];
G1_q[0] = DFFEAS(G1_q[0]_lut_out, clk, VCC, , , , , , );

--G1L14 is signal5:inst10|q[0]~88
--operation mode is arithmetic

G1L14 = CARRY(G1_q[0]);


--G1L53 is signal5:inst10|display[6]~1075
--operation mode is normal

G1L53 = G1_q[1] & (G1_q[2] # G1_q[0] & !G1_q[4]) # !G1_q[1] & G1_q[2] & (!G1_q[4]);


--G1L63 is signal5:inst10|display[6]~1076
--operation mode is normal

G1L63 = G1_q[5] & (G1_q[4]) # !G1_q[5] & (G1_q[3] & !G1_q[4] & !G1L53 # !G1_q[3] & (!G1L53 # !G1_q[4]));


--G1L73 is signal5:inst10|display[6]~1077
--operation mode is normal

G1L73 = G1_q[1] & (G1_q[2] # G1_q[3]) # !G1_q[1] & G1_q[2] & (G1_q[3] # G1_q[0]);


--G1L83 is signal5:inst10|display[6]~1078
--operation mode is normal

G1L83 = G1_q[5] & (G1L63 & (G1_q[3] # G1L73) # !G1L63 & G1_q[3] & G1L73) # !G1_q[5] & G1L63;


--B2L6 is selectsignal:inst7|Mux~522
--operation mode is normal

B2L6 = sel[0] # sel[2] & (!sel[1]);


--C1_tmp[6] is signal1:inst|tmp[6]
--operation mode is arithmetic

C1_tmp[6]_carry_eqn = C1L22;
C1_tmp[6]_lut_out = C1_a $ C1_tmp[6] $ C1_tmp[6]_carry_eqn;
C1_tmp[6] = DFFEAS(C1_tmp[6]_lut_out, clk, reset, , , C1L2, , , C1L61);

--C1L42 is signal1:inst|tmp[6]~363
--operation mode is arithmetic

C1L42 = CARRY(C1_a & !C1_tmp[6] & !C1L22 # !C1_a & (!C1L22 # !C1_tmp[6]));


--B2L7 is selectsignal:inst7|Mux~523
--operation mode is normal

B2L7 = B2L5 & (B2L6) # !B2L5 & (B2L6 & G1L83 # !B2L6 & (C1_tmp[6]));


--D1_tmp[6] is signal2:inst1|tmp[6]
--operation mode is arithmetic

D1_tmp[6]_carry_eqn = D1L11;
D1_tmp[6]_lut_out = D1_tmp[6] $ (D1_tmp[6]_carry_eqn);
D1_tmp[6] = DFFEAS(D1_tmp[6]_lut_out, clk, reset, , , , , , );

--D1L31 is signal2:inst1|tmp[6]~74
--operation mode is arithmetic

D1L31 = CARRY(!D1L11 # !D1_tmp[6]);


--B2L8 is selectsignal:inst7|Mux~524
--operation mode is normal

B2L8 = B2L5 & (B2L7 & (D1_tmp[6]) # !B2L7 & E1_tmp[6]) # !B2L5 & (B2L7);


--B2L9 is selectsignal:inst7|Mux~525
--operation mode is normal

B2L9 = sel[1] & (sel[0] & F1_tmp[6] # !sel[0] & (B2L8)) # !sel[1] & (B2L8);


--B2_q[6] is selectsignal:inst7|q[6]
--operation mode is normal

B2_q[6] = B2L4 & B2L9 # !B2L4 & (B2_q[6]);


--F1_tmp[5] is signal4:inst3|tmp[5]
--operation mode is normal

F1_tmp[5]_lut_out = !F1_tmp[5];
F1_tmp[5] = DFFEAS(F1_tmp[5]_lut_out, clk, reset, , F1_tmp[4], , , , );


--E1_tmp[5] is signal3:inst2|tmp[5]
--operation mode is arithmetic

E1_tmp[5]_carry_eqn = E1L11;
E1_tmp[5]_lut_out = E1_tmp[5] $ (!E1_tmp[5]_carry_eqn);
E1_tmp[5] = DFFEAS(E1_tmp[5]_lut_out, clk, VCC, , , VCC, !reset, , );

--E1L31 is signal3:inst2|tmp[5]~81
--operation mode is arithmetic

E1L31 = CARRY(!E1_tmp[5] & (!E1L11));


--G1L03 is signal5:inst10|display[5]~1079
--operation mode is normal

G1L03 = G1_q[1] & (G1_q[2] & !G1_q[3] & !G1_q[4] # !G1_q[2] & (G1_q[4])) # !G1_q[1] & (G1_q[3] $ (G1_q[2] & G1_q[4]));


--G1L13 is signal5:inst10|display[5]~1080
--operation mode is normal

G1L13 = G1_q[1] & (G1_q[3] $ (!G1_q[2] & G1_q[4])) # !G1_q[1] & G1_q[4] & (G1_q[2] # G1_q[3]);


--G1L23 is signal5:inst10|display[5]~1081
--operation mode is normal

G1L23 = G1_q[2] & (G1L13) # !G1_q[2] & (G1L03 $ (!G1_q[0] & G1L13));


--G1L33 is signal5:inst10|display[5]~1082
--operation mode is normal

G1L33 = G1_q[0] & G1_q[2] & G1L03 # !G1_q[0] & !G1_q[2] & (G1L13);


--G1L43 is signal5:inst10|display[5]~1083
--operation mode is normal

G1L43 = G1L23 $ (G1L33 # !G1_q[5]);


--C1_tmp[5] is signal1:inst|tmp[5]
--operation mode is arithmetic

C1_tmp[5]_carry_eqn = C1L02;
C1_tmp[5]_lut_out = C1_a $ C1_tmp[5] $ !C1_tmp[5]_carry_eqn;
C1_tmp[5] = DFFEAS(C1_tmp[5]_lut_out, clk, reset, , , C1L2, , , C1L61);

--C1L22 is signal1:inst|tmp[5]~367
--operation mode is arithmetic

C1L22 = CARRY(C1_a & (C1_tmp[5] # !C1L02) # !C1_a & C1_tmp[5] & !C1L02);


--B2L01 is selectsignal:inst7|Mux~526
--operation mode is normal

B2L01 = B2L5 & (B2L6) # !B2L5 & (B2L6 & G1L43 # !B2L6 & (C1_tmp[5]));


--D1_tmp[5] is signal2:inst1|tmp[5]
--operation mode is arithmetic

D1_tmp[5]_carry_eqn = D1L9;
D1_tmp[5]_lut_out = D1_tmp[5] $ (!D1_tmp[5]_carry_eqn);
D1_tmp[5] = DFFEAS(D1_tmp[5]_lut_out, clk, reset, , , , , , );

--D1L11 is signal2:inst1|tmp[5]~78
--operation mode is arithmetic

D1L11 = CARRY(D1_tmp[5] & (!D1L9));


--B2L11 is selectsignal:inst7|Mux~527
--operation mode is normal

B2L11 = B2L5 & (B2L01 & (D1_tmp[5]) # !B2L01 & E1_tmp[5]) # !B2L5 & (B2L01);


--B2L21 is selectsignal:inst7|Mux~528
--operation mode is normal

B2L21 = sel[1] & (sel[0] & F1_tmp[5] # !sel[0] & (B2L11)) # !sel[1] & (B2L11);


--B2_q[5] is selectsignal:inst7|q[5]
--operation mode is normal

B2_q[5] = B2L4 & B2L21 # !B2L4 & (B2_q[5]);


--F1_tmp[4] is signal4:inst3|tmp[4]
--operation mode is normal

F1_tmp[4]_lut_out = !F1_tmp[4];
F1_tmp[4] = DFFEAS(F1_tmp[4]_lut_out, clk, reset, , , , , , );


--G1L52 is signal5:inst10|display[4]~1084
--operation mode is normal

G1L52 = G1_q[1] & (G1_q[3] & (G1_q[4]) # !G1_q[3] & G1_q[2] & !G1_q[4]) # !G1_q[1] & (G1_q[3] & (G1_q[2] # !G1_q[4]) # !G1_q[3] & (G1_q[4]));


--G1L62 is signal5:inst10|display[4]~1085
--operation mode is normal

G1L62 = G1_q[1] & (G1_q[3] $ (!G1_q[2] & G1_q[4])) # !G1_q[1] & G1_q[4] & (G1_q[3] # !G1_q[2]);


--G1L72 is signal5:inst10|display[4]~1086
--operation mode is normal

G1L72 = G1_q[2] & (G1L62 # G1_q[0] $ G1L52) # !G1_q[2] & G1_q[0] & G1L52;


--G1L82 is signal5:inst10|display[4]~1087
--operation mode is normal

G1L82 = G1_q[0] & G1L52 & (G1_q[2] $ G1L62) # !G1_q[0] & (!G1L52 & G1L62);


--G1L92 is signal5:inst10|display[4]~1088
--operation mode is normal

G1L92 = G1L72 $ (!G1_q[5] & !G1L82);


--E1_tmp[4] is signal3:inst2|tmp[4]
--operation mode is arithmetic

E1_tmp[4]_carry_eqn = E1L9;
E1_tmp[4]_lut_out = E1_tmp[4] $ (E1_tmp[4]_carry_eqn);
E1_tmp[4] = DFFEAS(E1_tmp[4]_lut_out, clk, VCC, , , VCC, !reset, , );

--E1L11 is signal3:inst2|tmp[4]~85
--operation mode is arithmetic

E1L11 = CARRY(E1_tmp[4] # !E1L9);


--C1_tmp[4] is signal1:inst|tmp[4]
--operation mode is arithmetic

C1_tmp[4]_carry_eqn = C1L81;
C1_tmp[4]_lut_out = C1_a $ C1_tmp[4] $ C1_tmp[4]_carry_eqn;
C1_tmp[4] = DFFEAS(C1_tmp[4]_lut_out, clk, reset, , , C1L2, , , C1L61);

--C1L02 is signal1:inst|tmp[4]~371
--operation mode is arithmetic

C1L02 = CARRY(C1_a & !C1_tmp[4] & !C1L81 # !C1_a & (!C1L81 # !C1_tmp[4]));


--B2L31 is selectsignal:inst7|Mux~529
--operation mode is normal

B2L31 = B2L6 & (B2L5) # !B2L6 & (B2L5 & E1_tmp[4] # !B2L5 & (C1_tmp[4]));


--D1_tmp[4] is signal2:inst1|tmp[4]
--operation mode is arithmetic

D1_tmp[4]_carry_eqn = D1L7;
D1_tmp[4]_lut_out = D1_tmp[4] $ (D1_tmp[4]_carry_eqn);
D1_tmp[4] = DFFEAS(D1_tmp[4]_lut_out, clk, reset, , , , , , );

--D1L9 is signal2:inst1|tmp[4]~82
--operation mode is arithmetic

D1L9 = CARRY(!D1L7 # !D1_tmp[4]);


--B2L41 is selectsignal:inst7|Mux~530
--operation mode is normal

B2L41 = B2L6 & (B2L31 & (D1_tmp[4]) # !B2L31 & G1L92) # !B2L6 & (B2L31);


--B2L51 is selectsignal:inst7|Mux~531
--operation mode is normal

B2L51 = sel[1] & (sel[0] & F1_tmp[4] # !sel[0] & (B2L41)) # !sel[1] & (B2L41);


--B2_q[4] is selectsignal:inst7|q[4]
--operation mode is normal

B2_q[4] = B2L4 & B2L51 # !B2L4 & (B2_q[4]);


--G1L91 is signal5:inst10|display[3]~1089
--operation mode is normal

G1L91 = G1_q[1] & (G1_q[2] $ !G1_q[3] # !G1_q[0]) # !G1_q[1] & (G1_q[0] $ (!G1_q[2] & G1_q[3]));


--G1L02 is signal5:inst10|display[3]~1090
--operation mode is normal

G1L02 = G1_q[1] & (G1_q[0] $ (G1_q[2] & !G1_q[3])) # !G1_q[1] & !G1_q[0] & (G1_q[2] $ G1_q[3]);


--G1L12 is signal5:inst10|display[3]~1091
--operation mode is normal

G1L12 = G1_q[2] & (G1_q[0] $ G1_q[1] $ !G1_q[3]) # !G1_q[2] & !G1_q[0] & G1_q[1] & G1_q[3];


--G1L22 is signal5:inst10|display[3]~1092
--operation mode is normal

G1L22 = G1_q[4] & (G1_q[5]) # !G1_q[4] & (G1_q[5] & G1L02 # !G1_q[5] & (!G1L12));


--G1L32 is signal5:inst10|display[3]~1093
--operation mode is normal

G1L32 = G1_q[2] & G1_q[0] & !G1_q[1] & !G1_q[3] # !G1_q[2] & (G1_q[0] $ G1_q[1] $ G1_q[3]);

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