ecc_new2.rpt

用verlog HDL写的电子日历,可以显示年,月,日和时间,具有闹铃的功能

|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:559|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:559|altshift:oflow_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:560|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:560|addcore:adder|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:560|altshift:result_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:560|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:560|altshift:oflow_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:561|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:561|addcore:adder|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:561|altshift:result_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:561|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv28_31:57|lpm_add_sub:561|altshift:oflow_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv7:58|
|fdiv_cnt_new:83|fdiv7:58|lpm_add_sub:35|
|fdiv_cnt_new:83|fdiv7:58|lpm_add_sub:35|addcore:adder|
|fdiv_cnt_new:83|fdiv7:58|lpm_add_sub:35|altshift:result_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv7:58|lpm_add_sub:35|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv7:58|lpm_add_sub:35|altshift:oflow_ext_latency_ffs|
|fdiv_cnt_new:83|fdivyear:59|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:370|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:370|addcore:adder|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:370|altshift:result_ext_latency_ffs|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:370|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:370|altshift:oflow_ext_latency_ffs|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:371|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:371|addcore:adder|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:371|altshift:result_ext_latency_ffs|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:371|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdivyear:59|lpm_add_sub:371|altshift:oflow_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv12:70|
|fdiv_cnt_new:83|fdiv12:70|lpm_add_sub:119|
|fdiv_cnt_new:83|fdiv12:70|lpm_add_sub:119|addcore:adder|
|fdiv_cnt_new:83|fdiv12:70|lpm_add_sub:119|altshift:result_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv12:70|lpm_add_sub:119|altshift:carry_ext_latency_ffs|
|fdiv_cnt_new:83|fdiv12:70|lpm_add_sub:119|altshift:oflow_ext_latency_ffs|
|alarm_new:87|
|alarm_new:87|lpm_add_sub:463|
|alarm_new:87|lpm_add_sub:463|addcore:adder|
|alarm_new:87|lpm_add_sub:463|altshift:result_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:463|altshift:carry_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:463|altshift:oflow_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:464|
|alarm_new:87|lpm_add_sub:464|addcore:adder|
|alarm_new:87|lpm_add_sub:464|altshift:result_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:464|altshift:carry_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:464|altshift:oflow_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:465|
|alarm_new:87|lpm_add_sub:465|addcore:adder|
|alarm_new:87|lpm_add_sub:465|altshift:result_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:465|altshift:carry_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:465|altshift:oflow_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:466|
|alarm_new:87|lpm_add_sub:466|addcore:adder|
|alarm_new:87|lpm_add_sub:466|altshift:result_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:466|altshift:carry_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:466|altshift:oflow_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:467|
|alarm_new:87|lpm_add_sub:467|addcore:adder|
|alarm_new:87|lpm_add_sub:467|altshift:result_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:467|altshift:carry_ext_latency_ffs|
|alarm_new:87|lpm_add_sub:467|altshift:oflow_ext_latency_ffs|
|scan_disp_new:89|
|scan_disp_new:89|lpm_add_sub:1799|
|scan_disp_new:89|lpm_add_sub:1799|addcore:adder|
|scan_disp_new:89|lpm_add_sub:1799|altshift:result_ext_latency_ffs|
|scan_disp_new:89|lpm_add_sub:1799|altshift:carry_ext_latency_ffs|
|scan_disp_new:89|lpm_add_sub:1799|altshift:oflow_ext_latency_ffs|
|route_new1:90|
|route_new1:90|lpm_add_sub:263|
|route_new1:90|lpm_add_sub:263|addcore:adder|
|route_new1:90|lpm_add_sub:263|altshift:result_ext_latency_ffs|
|route_new1:90|lpm_add_sub:263|altshift:carry_ext_latency_ffs|
|route_new1:90|lpm_add_sub:263|altshift:oflow_ext_latency_ffs|
|route_new1:90|lpm_add_sub:264|
|route_new1:90|lpm_add_sub:264|addcore:adder|
|route_new1:90|lpm_add_sub:264|altshift:result_ext_latency_ffs|
|route_new1:90|lpm_add_sub:264|altshift:carry_ext_latency_ffs|
|route_new1:90|lpm_add_sub:264|altshift:oflow_ext_latency_ffs|
|route_new1:90|lpm_add_sub:265|
|route_new1:90|lpm_add_sub:265|addcore:adder|
|route_new1:90|lpm_add_sub:265|altshift:result_ext_latency_ffs|
|route_new1:90|lpm_add_sub:265|altshift:carry_ext_latency_ffs|
|route_new1:90|lpm_add_sub:265|altshift:oflow_ext_latency_ffs|
|route_new1:90|lpm_add_sub:266|
|route_new1:90|lpm_add_sub:266|addcore:adder|
|route_new1:90|lpm_add_sub:266|altshift:result_ext_latency_ffs|
|route_new1:90|lpm_add_sub:266|altshift:carry_ext_latency_ffs|
|route_new1:90|lpm_add_sub:266|altshift:oflow_ext_latency_ffs|


Device-Specific Information:e:\amj\2003_2004year\course\eda\2004year\2004_experiment\my_design\c&c\scheme4\ecc_new2.rpt
ecc_new2

***** Logic for device 'ecc_new2' compiled without errors.




Device: EPF10K10LC84-3

FLEX 10K Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    JTAG User Code                             = 7f

                                                                         ^     
                                                                         C     
                s  s     R  R  R  R     R                 s  s  s  s     O     
                c  c     E  E  E  E     E                 c  c  c  c     N     
                a  a     S  S  S  S  V  S  G     s     G  a  a  a  a     F     
                n  n  s  E  E  E  E  C  E  N     e     N  n  n  n  n     _  ^  
                _  _  _  R  R  R  R  C  R  D     l     D  _  _  _  _  #  D  n  
                e  e  c  V  V  V  V  I  V  I  c  e  s  I  e  e  e  e  T  O  C  
                n  n  l  E  E  E  E  N  E  N  l  c  e  N  n  n  n  n  C  N  E  
                6  5  k  D  D  D  D  T  D  T  k  t  t  T  4  3  2  1  K  E  O  
              -----------------------------------------------------------------_ 
            /  11 10  9  8  7  6  5  4  3  2  1 84 83 82 81 80 79 78 77 76 75   | 
    ^DATA0 | 12                                                              74 | #TDO 
     ^DCLK | 13                                                              73 | RESERVED 
      ^nCE | 14                                                              72 | RESERVED 
      #TDI | 15                                                              71 | RESERVED 
      out6 | 16                                                              70 | day_clk 
      out5 | 17                                                              69 | RESERVED 
      out4 | 18                                                              68 | GNDINT 
      out3 | 19                                                              67 | RESERVED 
    VCCINT | 20                                                              66 | RESERVED 
      out2 | 21                                                              65 | RESERVED 
      out1 | 22                        EPF10K10LC84-3                        64 | RESERVED 
      out0 | 23                                                              63 | VCCINT 
        dp | 24                                                              62 | RESERVED 
  RESERVED | 25                                                              61 | RESERVED 
    GNDINT | 26                                                              60 | RESERVED 
  RESERVED | 27                                                              59 | RESERVED 
     h_clk | 28                                                              58 | RESERVED 
   min_clk | 29                                                              57 | #TMS 
  RESERVED | 30                                                              56 | #TRST 
    ^MSEL0 | 31                                                              55 | ^nSTATUS 
    ^MSEL1 | 32                                                              54 | RESERVED 
           |_  33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53  _| 
             ------------------------------------------------------------------ 
                V  ^  R  R  R  R  R  V  G  G  G  m  V  G  R  R  R  R  R  R  a  
                C  n  E  E  E  E  E  C  N  N  N  o  C  N  E  E  E  E  E  E  l  
                C  C  S  S  S  S  S  C  D  D  D  d  C  D  S  S  S  S  S  S  a  
                I  O  E  E  E  E  E  I  I  I  I  e  I  I  E  E  E  E  E  E  r  
                N  N  R  R  R  R  R  N  N  N  N     N  N  R  R  R  R  R  R  m  
                T  F  V  V  V  V  V  T  T  T  T     T  T  V  V  V  V  V  V     
                   I  E  E  E  E  E                       E  E  E  E  E  E     
                   G  D  D  D  D  D                       D  D  D  D  D  D     
                                                                               
                                                                               


N.C. = No Connect. This pin has no internal connection to the device.
VCCINT = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
VCCIO = Dedicated power pin, which MUST be connected to VCC (5.0 volts).
GNDINT = Dedicated ground pin or unused dedicated input, which MUST be connected to GND.
GNDIO = Dedicated ground pin, which MUST be connected to GND.
RESERVED = Unused I/O pin, which MUST be left unconnected.

^ = Dedicated configuration pin.
+ = Reserved configuration pin, which is tri-stated during user mode.
* = Reserved configuration pin, which drives out in user mode.
PDn = Power Down pin. 
@ = Special-purpose pin. 
# = JTAG Boundary-Scan Testing/In-System Programming or Configuration Pin. The JTAG inputs TMS and TDI should be tied to VCC and TCK should be tied to GND when not in use.
& = JTAG pin used for I/O. When used as user I/O, JTAG pins must be kept stable before and during configuration.  JTAG pin stability prevents accidental loading of JTAG instructions.