📄 dve_ccir_vtg.v
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// Lines, where the color is enabled
`define LINE_NUMBER_6 (10'd6 - 10'd1)
`define LINE_NUMBER_7 (10'd7 - 10'd1)
`define LINE_NUMBER_17 (10'd17 -10'd1)
`define LINE_NUMBER_24 (10'd24 -10'd1)
`define LINE_NUMBER_260 (10'd260-10'd1)
`define LINE_NUMBER_261 (10'd261-10'd1)
`define LINE_NUMBER_270 (10'd270-10'd1)
`define LINE_NUMBER_282 (10'd282-10'd1)
`define LINE_NUMBER_310 (10'd310-10'd1)
`define LINE_NUMBER_311 (10'd311-10'd1)
`define LINE_NUMBER_319 (10'd319-10'd1)
`define LINE_NUMBER_320 (10'd320-10'd1)
`define LINE_NUMBER_336 (10'd336-10'd1)
`define LINE_NUMBER_523 (10'd523-10'd1)
`define LINE_NUMBER_622 (10'd622-10'd1)
`define LINE_NUMBER_623 (10'd623-10'd1)
// For the ortogonal frame structure compensation in the PAL mode
`define PAL_MIDDLE_LINE (10'd313-10'd1) //
`define PAL_LAST_LINE (10'd625-10'd1) //
`define PAL_LINES_PER_FRAME (10'd625-10'd1)
`define NTSC_LINES_PER_FRAME (10'd525-10'd1)
`define PAL_HALFLINE_SAMPLES (10'd864-10'd1) // PAL HALFLINE SAMPLES 64us/2
`define PAL_ENDOFSYNC_LINE (10'd128-10'd1) // normal 4.70 us= 127 SAMPLES @ 27MHz
`define PAL_ENDOFSYNC_EQU (10'd64 -10'd1) // equlization 2.35 us= 64 SAMPLES @ 27MHz
`define PAL_ENDOFSYNC_SERR (10'd737-10'd1) // serration 27.3 us= 737 SAMPLES @ 27MHz
`define NTSC_HALFLINE_SAMPLES (10'd858-10'd1) // NTSC HALFLINE SAMPLES 63.5(5)/2
`define NTSC_ENDOFSYNC_LINE (10'd128-10'd1) // normal 4.7 us = 127 SAMPLES @ 27MHz
`define NTSC_ENDOFSYNC_EQU (10'd62 -10'd1) // equlization 2.3 us equalization 4.70 us= 62 PAL SAMPLES
`define NTSC_ENDOFSYNC_SERR (10'd729-10'd1) // serration 27.1 us= 729 SAMPLES @ 27MHz
// Pipelining is taken into account
// Values for the colorburst insertion
`define PAL_CBURST_ON (10'd152-10'd0) // PAL:5.6 us @ 17.734475 MHz
`define PAL_CBURST_OFF (10'd214-10'd0) // PAL: 5.6 us + 10 FSc cycles @ 4.43
`define NTSC_CBURST_ON (10'd144-10'd0) // NTSC:19 FSc cycles @3.57
`define NTSC_CBURST_OFF (10'd212-10'd0) // NTSC:28 FSc cycles @3.57
// Video blanking intervals for PAL and NTSC modes
`define PIPELINE_DELAY (11'd0) // pipeline delay
`define PAL_VIDEO_ENABLE (11'd284 +`PIPELINE_DELAY-11'd1)
`define PAL_VIDEO_DISABLE (11'd1688+`PIPELINE_DELAY-11'd1)
`define NTSC_VIDEO_ENABLE (11'd252 +`PIPELINE_DELAY-11'd1)
`define NTSC_VIDEO_DISABLE (11'd1674+`PIPELINE_DELAY-11'd1)
`define COLORBAR_WIDTH_PAL (8'd176 - 8'd1)
`define COLORBAR_WIDTH_NTSC (8'd176 - 8'd1)
// -----------------------------------------------------------------------------
//
// Pixel counter counts upto half line last sample value .....
//
// -----------------------------------------------------------------------------
always @(posedge sclk)
if (!srst_n || last_line_sample) pixel_counter <= {PIXEL_COUNTER_WIDTH{1'b0}};
else pixel_counter <= pixel_counter + {{PIXEL_COUNTER_WIDTH-1{1'b0}},1'b1};
// -----------------------------------------------------------------------------
//
// Last halfline sample comparator.....
//
// -----------------------------------------------------------------------------
assign last_line_sample = (coding_ntsc) ? (pixel_counter == `NTSC_HALFLINE_SAMPLES) :
(pixel_counter == `PAL_HALFLINE_SAMPLES);
assign middle_of_frame = (line_counter == `PAL_MIDDLE_LINE);
assign end_of_frame = (line_counter == `PAL_LAST_LINE);
// -----------------------------------------------------------------------------
//
// HALFLINE counter counts upto the last halfline number ...
//
// -----------------------------------------------------------------------------
always @(posedge sclk)
if (~srst_n | last_halfline & last_line_sample) halfline_counter <= {HALFLINE_COUNTER_WIDTH{1'b0}};
else if (last_line_sample) halfline_counter <= halfline_counter + {{PIXEL_COUNTER_WIDTH-1{1'b0}},1'b1};
// -----------------------------------------------------------------------------
//
// LINE counter counts upto the last line number in the field
//
// -----------------------------------------------------------------------------
always @(posedge sclk)
if (~srst_n | last_line_sample & last_line & ~sm_first_halfline_reg)
line_counter <= {LINE_COUNTER_WIDTH{1'b0}};
else if (last_line_sample & ~sm_first_halfline_reg)
line_counter <= line_counter + {{LINE_COUNTER_WIDTH-1{1'b0}},1'b1};
assign last_line = (coding_ntsc) ? (line_counter == `NTSC_LINES_PER_FRAME) :
(line_counter == `PAL_LINES_PER_FRAME);
// -----------------------------------------------------------------------------
//
// The last halfline number comparator ....
//
// -----------------------------------------------------------------------------
assign last_halfline = (halfline_counter == last_halfline_reg);
// -----------------------------------------------------------------------------
//
// .... The halfline register dynamically stores the current value of the last
// halfline number ....
//
// -----------------------------------------------------------------------------
always @(posedge sclk)
begin
if (~srst_n | ((sm_sc_serr_reg | sm_sc_preequ_reg | sm_sc_postequ_reg) & ~coding_ntsc))
last_halfline_reg <= `PAL_SYNPULSE_NUMBER;
else if ((sm_sc_preequ_reg | sm_sc_postequ_reg | sm_sc_serr_reg) & coding_ntsc)
last_halfline_reg <= `NTSC_SYNPULSE_NUMBER;
else if (sm_sc_linespace_reg & ~coding_ntsc)
last_halfline_reg <= `PAL_HALFLINE_NUMBER;
else last_halfline_reg <= `NTSC_HALFLINE_NUMBER;
end
// -----------------------------------------------------------------------------
// PREEQUALIZATION, SERRATION, POSTEQUALIZATION and FIELD SPACE state machine
// ONE-HOT implementation
// Reset state: SERRATION (beginning of the next field)
// -----------------------------------------------------------------------------
always @(posedge sclk)
begin
sm_sc_preequ_reg <= srst_n & ((~sm_sc_preequ_reg & sm_sc_linespace_reg & last_line_sample
& last_halfline) | (sm_sc_preequ_reg & ~(last_line_sample & last_halfline)));
sm_sc_serr_reg <= ~srst_n | (srst_n & ~sm_sc_serr_reg & sm_sc_preequ_reg & last_line_sample
& last_halfline) | (srst_n & sm_sc_serr_reg & ~(last_line_sample & last_halfline));
sm_sc_postequ_reg<= srst_n & ((~sm_sc_postequ_reg & sm_sc_serr_reg & last_line_sample
& last_halfline) | (sm_sc_postequ_reg & ~(last_line_sample & last_halfline)));
sm_sc_linespace_reg <= srst_n & (( ~sm_sc_linespace_reg & sm_sc_postequ_reg & last_line_sample
& last_halfline) | (sm_sc_linespace_reg & ~(last_line_sample & last_halfline)));
end
// -----------------------------------------------------------------------------
//
// ..... HALF-LINE length control state machine. Required only in the PAL mode .....
//
// -----------------------------------------------------------------------------
always @(posedge sclk)
sm_first_halfline_reg <= ~srst_n | (~sm_first_halfline_reg & last_line_sample) |
(sm_first_halfline_reg & ~last_line_sample);
// -----------------------------------------------------------------------------
//
// ..... ODD/EVEN frame control state machine
//
// -----------------------------------------------------------------------------
always @(posedge sclk)
begin
sm_first_frame_reg <= ~srst_n |
(~sm_first_frame_reg & last_line_sample & last_line & ~sm_first_halfline_reg) |
(sm_first_frame_reg & ~(last_line_sample & last_line & ~sm_first_halfline_reg));
sm_fields_one_to_four_reg <= ~srst_n |
(~sm_fields_one_to_four_reg & last_line_sample & last_line
& ~sm_first_halfline_reg & ~sm_first_frame_reg)|
(sm_fields_one_to_four_reg
& ~(last_line_sample & last_line & ~sm_first_halfline_reg & ~sm_first_frame_reg));
end
// -----------------------------------------------------------------------------
// Active at the time of the first halfline sample every odd halfline at the active space or
// every halfline at the time of serration and equalization pulses
//
// -----------------------------------------------------------------------------
assign start_sync = (sm_sc_linespace_reg & ~sm_first_halfline_reg & last_line_sample) |
// Always generated to start the preequalisation phase
(sm_sc_linespace_reg & last_halfline & last_line_sample) |
// For all the series of preequalisation/serration/postequ.
(sm_sc_preequ_reg | sm_sc_serr_reg) & last_line_sample |
// For all synchrostarts at the postequalisation pulses
(sm_sc_postequ_reg & ~last_halfline & last_line_sample) |
// The first synchrostart at the linespace
(sm_sc_postequ_reg & last_halfline & ~sm_first_halfline_reg & last_line_sample);
// Depending on the selected coding standard, signals the end of sync
assign end_sync = end_of_sync_line & sm_sc_linespace_reg & sm_first_halfline_reg |
end_of_sync_equ & (sm_sc_preequ_reg | sm_sc_postequ_reg) |
end_of_sync_serr & sm_sc_serr_reg;
// -----------------------------------------------------------------------------
// The "end of sync tip" comparators
// -----------------------------------------------------------------------------
assign end_of_sync_line = (coding_ntsc) ?
(pixel_counter==`NTSC_ENDOFSYNC_LINE):(pixel_counter==`PAL_ENDOFSYNC_LINE);
assign end_of_sync_serr = (coding_ntsc) ?
(pixel_counter==`NTSC_ENDOFSYNC_SERR):(pixel_counter==`PAL_ENDOFSYNC_SERR);
assign end_of_sync_equ = (coding_ntsc) ?
(pixel_counter==`NTSC_ENDOFSYNC_EQU):(pixel_counter==`PAL_ENDOFSYNC_EQU);
// -----------------------------------------------------------------------------
// SYNC TIP state machine (one-hot implementation)
// -----------------------------------------------------------------------------
// In PAL mode the slope is equal to 0.2us+/-0.1us 4 samples
// In NTSC 0.14us+/-0.1 us
// Necessary to have two different LUTs to express different sync values and travel
// points
always @(posedge sclk)
begin
csync_out <= srst_n & ((csync_out & ~start_sync) | (~csync_out & end_sync));
vsync_out <= srst_n & ((vsync_out & ~(sm_sc_preequ_reg & last_line_sample
& last_halfline)) | (~vsync_out & last_line_sample & last_halfline));
sm_hsync_reg <= srst_n & ( sm_hsync_reg & ~(~sm_first_halfline_reg & last_line_sample) |
~sm_hsync_reg & end_of_sync_line);
end
assign hsync_out = sm_hsync_reg;
// -----------------------------------------------------------------------------
// SYNC TIP state machine (one-hot implementation)
// -----------------------------------------------------------------------------
// In PAL mode the slope is equal to 0.2us+/-0.1us 4 samples
// In NTSC 0.14us+/-0.1 us
// Necessary to have two different LUTs to express different sync values and travel
// points
always @(sm_tip_state or start_sync or end_sync)
case (sm_tip_state)
`SYNC_TIP_IDLE : if (start_sync) sm_tip_next=`SYNC_TIP_LEADER;
else sm_tip_next=`SYNC_TIP_IDLE;
`SYNC_TIP_LEADER: if (sm_tipstat == `SYNC_STAT_ACTIVE) sm_tip_next=`SYNC_TIP_ZEROH;
else sm_tip_next = `SYNC_TIP_IDLE;
`SYNC_TIP_ZEROH: if (sm_tipstat == `SYNC_STAT_ACTIVE) sm_tip_next=`SYNC_TIP_TRAILER;
else sm_tip_next = `SYNC_TIP_LEADER;
`SYNC_TIP_TRAILER: if (sm_tipstat == `SYNC_STAT_ACTIVE) sm_tip_next=`SYNC_TIP_LEVEL;
else sm_tip_next = `SYNC_TIP_ZEROH;
`SYNC_TIP_LEVEL: if (end_sync) sm_tip_next=`SYNC_TIP_TRAILER;
else sm_tip_next=`SYNC_TIP_LEVEL;
default: sm_tip_next=`SYNC_TIP_IDLE;
endcase
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