remove_add_constraints_for_ddr_sdram_2005_05_13___11_42.tcl

这个是基于NIOS II的FPGA平台的一个CF卡的接口模块

set add_remove_string "-remove"
set do_analysis 0
set check_path_from_report 0
set hierarchy_path_to_instance std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|
set top_level standard
#
# Auto-generated DDR & DDR2 SDRAM Controller Compiler Constraint Script 
#
# (C) COPYRIGHT 2005 ALTERA CORPORATION 
# ALL RIGHTS RESERVED 
#
#------------------------------------------------------------------------
# This script will apply various placement, I/O standard and other       
# constraints to the current project. It is generated for a specific     
# instance of the DDR & DDR2 SDRAM Controller. It will apply constraints 
# according to the settings that were chosen in the MegaWizard and can   
# only be used to constrain this particular instance.                    
#------------------------------------------------------------------------



    ############################################################################
    #  In this section you can set all the pin names, hierarchy and top level  #
    ############################################################################
    set wizard_top_level                   ddr_sdram_debug_design; # this should be extracted automatically. If it fails use this setting
    set wizard_hier_path                   "Automatically extracted by Quartus synthesis|" ; # REMEMBER TO FINISH THE PATH WITH A | (ie a vertical bar)

    set prefix_name                        ddr_
    set pin_file                           c:/altera/megacore/ddr_ddr2_sdram-v3.2.0/lib/ip_toolbench/../../constraints/sopc_cycloneii_nios_pins.tcl

    set cas_n_pin_name                     cas_n
    set clock_neg_pin_name                 clk_to_sdram_n
    set clockfeedback_in_pin_name          fedback_clock_in
    set bank_address_pin_name              ba
    set dm_pin_name                        dm
    set clock_enable_pin_name              cke
    set cs_n_pin_name                      cs_n
    set ras_n_pin_name                     ras_n
    set dq_pin_name                        dq
    set clock_pos_pin_name                 clk_to_sdram
    set address_pin_name                   a
    set write_enable_n_pin_name            we_n
    set dqs_pin_name                       dqs
    set do_analysis                        1 ; # only set this to 0 if you already have run analysis on your project. It can stay set to 1.
    set check_path_from_report             1 ; # only set this to 0 if you already have run analysis on your project. It can stay set to 1.
    ###########################################################################

puts "\n*********************************************************************"
puts "*                DDR & DDR2 SDRAM Controller Compiler                *"
puts "*   Applying the constraints for the datapath in the your MegaCore   *"
puts "*********************************************************************\n"

###########################################################################
#                      Loading the required TCL packages        
###########################################################################

    package require ::quartus::project
    package require ::quartus::flow
    package require ::quartus::report

###########################################################################
#        Checking if a remove_add_constrints script exist                 #
#        if so run it else run the add_constrints script                  #
###########################################################################

    set run_var 0
    set remove_file "remove_add_constraints_for_ddr_sdram.tcl"
            if {![file exists $remove_file]} {
                set run_var 1
            } else {
                if {![info exists add_remove_string]} { 
                    source $remove_file
                    set run_var 1
                } else {
                    set run_var 1
                }
            }

###########################################################################
#                     Check that the device is correct        
###########################################################################

if { $run_var != 0 } {

###########################################################################
#    Procedure check_paths() will analyse the project and check        
#    that the paths match the ones that the user may have changed 
#    in the file or MegaWizard                                             
###########################################################################

    proc check_paths {given_datapath_name do_analysis} {
		puts                    "\nNote: The add_constraints script is searching the correct path to the datapath in your MegaCore"
	    if {$do_analysis} {puts "      Analysis and Elaboration will be run and will take some time...\n"}

        set top_level ""

        if {$do_analysis} {

            set err [catch {execute_flow -analysis_and_elaboration } result]