standard.qsf

这个是基于NIOS II的FPGA平台的一个CF卡的接口模块

set_location_assignment PIN_L6 -to data_to_and_from_the_ext_ssram[3]
set_location_assignment PIN_N9 -to data_to_and_from_the_ext_ssram[4]
set_location_assignment PIN_P9 -to data_to_and_from_the_ext_ssram[5]
set_location_assignment PIN_K1 -to data_to_and_from_the_ext_ssram[6]
set_location_assignment PIN_K2 -to data_to_and_from_the_ext_ssram[7]
set_location_assignment PIN_K4 -to data_to_and_from_the_ext_ssram[8]
set_location_assignment PIN_K3 -to data_to_and_from_the_ext_ssram[9]
set_location_assignment PIN_J2 -to data_to_and_from_the_ext_ssram[10]
set_location_assignment PIN_J1 -to data_to_and_from_the_ext_ssram[11]
set_location_assignment PIN_H2 -to data_to_and_from_the_ext_ssram[12]
set_location_assignment PIN_H1 -to data_to_and_from_the_ext_ssram[13]
set_location_assignment PIN_J3 -to data_to_and_from_the_ext_ssram[14]
set_location_assignment PIN_J4 -to data_to_and_from_the_ext_ssram[15]
set_location_assignment PIN_H3 -to data_to_and_from_the_ext_ssram[16]
set_location_assignment PIN_H4 -to data_to_and_from_the_ext_ssram[17]
set_location_assignment PIN_G1 -to data_to_and_from_the_ext_ssram[18]
set_location_assignment PIN_G2 -to data_to_and_from_the_ext_ssram[19]
set_location_assignment PIN_F2 -to data_to_and_from_the_ext_ssram[20]
set_location_assignment PIN_F1 -to data_to_and_from_the_ext_ssram[21]
set_location_assignment PIN_K8 -to data_to_and_from_the_ext_ssram[22]
set_location_assignment PIN_K7 -to data_to_and_from_the_ext_ssram[23]
set_location_assignment PIN_G4 -to data_to_and_from_the_ext_ssram[24]
set_location_assignment PIN_G3 -to data_to_and_from_the_ext_ssram[25]
set_location_assignment PIN_K6 -to data_to_and_from_the_ext_ssram[26]
set_location_assignment PIN_K5 -to data_to_and_from_the_ext_ssram[27]
set_location_assignment PIN_E2 -to data_to_and_from_the_ext_ssram[28]
set_location_assignment PIN_E1 -to data_to_and_from_the_ext_ssram[29]
set_location_assignment PIN_J8 -to data_to_and_from_the_ext_ssram[30]
set_location_assignment PIN_J7 -to data_to_and_from_the_ext_ssram[31]
set_location_assignment PIN_D5 -to outputenable_n_to_the_ext_ssram
set_location_assignment PIN_J9 -to bwe_n_to_the_ext_ssram
set_location_assignment PIN_D7 -to ssram_adsp_n
set_location_assignment PIN_H10 -to ssram_adv_n
set_location_assignment PIN_E5 -to sram_clk
set_location_assignment PIN_N2 -to sram_clkin
set_location_assignment PIN_Y11 -to in_port_to_the_button_pio[0]
set_location_assignment PIN_AA10 -to in_port_to_the_button_pio[1]
set_location_assignment PIN_AB10 -to in_port_to_the_button_pio[2]
set_location_assignment PIN_AE6 -to in_port_to_the_button_pio[3]
set_location_assignment PIN_M21 -to cf_addr[0]
set_location_assignment PIN_J26 -to cf_addr[1]
set_location_assignment PIN_T23 -to cf_addr[2]
set_location_assignment PIN_V25 -to cf_addr[3]
set_location_assignment PIN_V26 -to cf_addr[4]
set_location_assignment PIN_U21 -to cf_addr[5]
set_location_assignment PIN_U20 -to cf_addr[6]
set_location_assignment PIN_T19 -to cf_addr[7]
set_location_assignment PIN_R19 -to cf_addr[8]
set_location_assignment PIN_U26 -to cf_addr[9]
set_location_assignment PIN_T18 -to cf_addr[10]
set_location_assignment PIN_H24 -to cf_data[0]
set_location_assignment PIN_G26 -to cf_data[1]
set_location_assignment PIN_G24 -to cf_data[2]
set_location_assignment PIN_P18 -to cf_data[3]
set_location_assignment PIN_F26 -to cf_data[4]
set_location_assignment PIN_J20 -to cf_data[5]
set_location_assignment PIN_F23 -to cf_data[6]
set_location_assignment PIN_E25 -to cf_data[7]
set_location_assignment PIN_F24 -to cf_data[8]
set_location_assignment PIN_J21 -to cf_data[9]
set_location_assignment PIN_F25 -to cf_data[10]
set_location_assignment PIN_N18 -to cf_data[11]
set_location_assignment PIN_G23 -to cf_data[12]
set_location_assignment PIN_G25 -to cf_data[13]
set_location_assignment PIN_H23 -to cf_data[14]
set_location_assignment PIN_J23 -to cf_data[15]
set_location_assignment PIN_Y22 -to cf_rfu
set_location_assignment PIN_K18 -to cf_iordy
set_location_assignment PIN_V24 -to cf_we_n
set_location_assignment PIN_W15 -to cf_detect
set_location_assignment PIN_K24 -to cf_intrq
set_location_assignment PIN_R17 -to cf_cs_n[0]
set_location_assignment PIN_W16 -to cf_cs_n[1]
set_location_assignment PIN_AE16 -to cf_atasel
set_location_assignment PIN_H26 -to cf_iord_n
set_location_assignment PIN_H25 -to cf_iowr_n
set_location_assignment PIN_AD16 -to cf_power
set_location_assignment PIN_U26 -to LCD_E_from_the_lcd_display
set_location_assignment PIN_T18 -to LCD_RS_from_the_lcd_display
set_location_assignment PIN_T17 -to LCD_RW_from_the_lcd_display
set_location_assignment PIN_R19 -to LCD_data_to_and_from_the_lcd_display[0]
set_location_assignment PIN_T19 -to LCD_data_to_and_from_the_lcd_display[1]
set_location_assignment PIN_U20 -to LCD_data_to_and_from_the_lcd_display[2]
set_location_assignment PIN_U21 -to LCD_data_to_and_from_the_lcd_display[3]
set_location_assignment PIN_V26 -to LCD_data_to_and_from_the_lcd_display[4]
set_location_assignment PIN_V25 -to LCD_data_to_and_from_the_lcd_display[5]
set_location_assignment PIN_V24 -to LCD_data_to_and_from_the_lcd_display[6]
set_location_assignment PIN_V23 -to LCD_data_to_and_from_the_lcd_display[7]
set_location_assignment LAB_X1_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:0:dq_io|ddio_bidir_6bg:auto_generated|input_cell_h[0]"
set_location_assignment LAB_X1_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:0:dq_io|ddio_bidir_6bg:auto_generated|input_cell_l[0]"
set_location_assignment LAB_X1_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:0:dq_io|ddio_bidir_6bg:auto_generated|input_latch_l[0]"
set_location_assignment LAB_X2_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:0:dq_io|ddio_bidir_6bg:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:0:dq_io|ddio_bidir_6bg:auto_generated|output_cell_L[0]"
set_location_assignment LAB_X2_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:0:dq_io|ddio_bidir_6bg:auto_generated|oe_cell"
set_location_assignment LAB_X3_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[0]"
set_location_assignment LAB_X3_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[8]"
set_location_assignment LAB_X1_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:1:dq_io|ddio_bidir_6bg:auto_generated|input_cell_h[0]"
set_location_assignment LAB_X1_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:1:dq_io|ddio_bidir_6bg:auto_generated|input_cell_l[0]"
set_location_assignment LAB_X1_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:1:dq_io|ddio_bidir_6bg:auto_generated|input_latch_l[0]"
set_location_assignment LAB_X2_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:1:dq_io|ddio_bidir_6bg:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:1:dq_io|ddio_bidir_6bg:auto_generated|output_cell_L[0]"
set_location_assignment LAB_X2_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:1:dq_io|ddio_bidir_6bg:auto_generated|oe_cell"
set_location_assignment LAB_X3_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[1]"
set_location_assignment LAB_X3_Y17 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[9]"
set_location_assignment LAB_X1_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:2:dq_io|ddio_bidir_6bg:auto_generated|input_cell_h[0]"
set_location_assignment LAB_X1_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:2:dq_io|ddio_bidir_6bg:auto_generated|input_cell_l[0]"
set_location_assignment LAB_X1_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:2:dq_io|ddio_bidir_6bg:auto_generated|input_latch_l[0]"
set_location_assignment LAB_X2_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:2:dq_io|ddio_bidir_6bg:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:2:dq_io|ddio_bidir_6bg:auto_generated|output_cell_L[0]"
set_location_assignment LAB_X2_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:2:dq_io|ddio_bidir_6bg:auto_generated|oe_cell"
set_location_assignment LAB_X3_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[2]"
set_location_assignment LAB_X3_Y16 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|resynched_data[10]"
set_location_assignment LAB_X1_Y15 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:3:dq_io|ddio_bidir_6bg:auto_generated|input_cell_h[0]"
set_location_assignment LAB_X1_Y15 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:3:dq_io|ddio_bidir_6bg:auto_generated|input_cell_l[0]"
set_location_assignment LAB_X1_Y15 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:3:dq_io|ddio_bidir_6bg:auto_generated|input_latch_l[0]"
set_location_assignment LAB_X2_Y15 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:3:dq_io|ddio_bidir_6bg:auto_generated|output_cell_H[0]"
set_location_assignment LAB_X2_Y15 -to "std_2C35:inst|ddr_sdram:the_ddr_sdram|ddr_sdram_auk_ddr_sdram:ddr_sdram_auk_ddr_sdram_inst|ddr_sdram_auk_ddr_datapath:ddr_io|ddr_sdram_auk_ddr_dqs_group:\\g_datapath:0:g_ddr_io|altddio_bidir:\\g_dq_io:3:dq_io|ddio_bidir_6bg:auto_generated|output_cell_L[0]"