ddr_sdram.inc

这个是基于NIOS II的FPGA平台的一个CF卡的接口模块

-- Generated by DDR SDRAM Controller 3.2.0 [Altera, IP Toolbench v1.2.9 build43]
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
-- ************************************************************
-- Copyright (C) 1991-2005 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
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-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
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FUNCTION ddr_sdram
(
	clk,
	write_clk,
	reset_n,
	local_read_req,
	local_write_req,
	local_addr[22..0],
	local_wdata[31..0],
	local_be[3..0]
)
RETURNS (
	local_ready,
	local_rdata[31..0],
	local_rdata_valid,
	clk_to_sdram,
	clk_to_sdram_n,
	ddr_cs_n,
	ddr_cke,
	ddr_a[12..0],
	ddr_ba[1..0],
	ddr_ras_n,
	ddr_cas_n,
	ddr_we_n,
	ddr_dm[1..0],
	ddr_dq[15..0],
	ddr_dqs[1..0]
);