led.vhd

扳动定义为“开始”（即enable）的开关后

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

--  Uncomment the following lines to use the declarations that are
--  provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;

entity light is
    port(--en:in std_logic;
	      clk:in std_logic;
			input:in std_logic_vector(3 downto 0);
			flag:in std_logic;
			seg:out std_logic_vector(3 downto 0);
			ledout:out std_logic_vector(7 downto 0)
			);
end light;

architecture Behavioral of light is
signal temp:std_logic_vector(3 downto 0);
signal temp_f:std_logic;
begin
temp<=input;
temp_f<=flag;
ledout(7)<='1';
led:process(clk,temp,temp_f,flag)
begin
if(clk'event and clk='1') then
   --if(en='1') then
	--seg<="0000";
	--ledout<="1111111";
	--end if;
	--if(en='0') then
	  if(temp_f='1') then
	     case temp is
		       when "0001" =>seg<="0001";ledout(6 downto 0)<="1111001";
				 when "0010" =>seg<="0010";ledout(6 downto 0)<="0100100";
				 when "0100" =>seg<="0100";ledout(6 downto 0)<="0110000";
				 when "1000" =>seg<="1000";ledout(6 downto 0)<="0011001";
				 when others =>seg<="0000";ledout(6 downto 0)<="1111111";
        end case;
	  --else
	    --seg<="0000";
	    --ledout<="1111111";
     end if;
	--end if;
end if;
end process;
end Behavioral;