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📄 去抖动debunce.txt

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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
entity debunce is
  port(cp      :in std_logic;
       key     :in std_logic;
       dly_out :out std_logic;
       dif_out :out std_logic);
end debunce;
architecture a of debunce is
     signal sample,dly,ndly,diff:std_logic;
begin
count:block
    signal q :std_logic_vector(14 downto 0);
    signal d0:std_logic;
begin
    process(cp)
     begin
          if cp 'event and cp ='1'then
              d0<=q(14);
              q<=q+'1';
          end if;
    end process; 
    sample<=q(14) and not d0;
end block count;
debunce: block
    signal d0,d1,s,r: std_logic;
begin
    process(cp)
    begin
         if cp'event and cp='1' then
               if sample='1' then
                    d1<=d0;d0<=key;
                    s<=d0 and d1;
                    r<=not d0 and not d1;
               end if;
          end if;
     end process;
     dly<=r nor ndly;
     ndly<=s nor dly;
     dly_out<=dly;
end block debunce;
wei: block
     signal d1,d0: std_logic;
     begin
     process(cp)
     begin
          if cp'event and cp='1' then
              d1<=d0;d0<=dly;
          end if;
     end process;
     diff<=d0 and not d1;
end block wei;
dif_out<=diff;
end a;       

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