oaverilogtest.cpp

openaccess与verilog互相转化时所用的源代码

// *****************************************************************************
// *****************************************************************************
// oaVerilogTest.cpp
//
// This file contains the implementation of the	base test driver for the 
// Verilog to OpenAccess reader and the OpenAccess to Verilog writer.
//
// *****************************************************************************
// Except as specified in the OpenAccess terms of use of Cadence or Silicon
// Integration Initiative, this	material may not be copied, modified,
// re-published, uploaded, executed, or	istributed in any way, in any medium,
// in whole or in part,	without	prior written permission from Cadence.
//
//		  Copyright 2003-2005 Cadence Design	Systems, Inc.
//			     All Rights	Reserved.
//
//  $Author: shaun $
//  $Revision: 1.22 $
//  $Date: 2005/07/08 01:27:45 $
//  $State: Exp $
// *****************************************************************************
// *****************************************************************************



#include "oaVerilogTest.h"
#ifndef	WINDOWS
#include <sys/types.h>
#include <sys/stat.h>
#endif



// *****************************************************************************
// Initialize Static Members
// *****************************************************************************
#ifdef WINDOWS
const oaString	oaVerilogTest::ds   = "\\";
#else
const oaString	oaVerilogTest::ds    = "/";
#endif
const oaString	oaVerilogTest::starLine = "*******************************"
					  "*******************************"
					  "****************\n";  




// *****************************************************************************
// oaVerilogTest::oaVerilogTest
//
// This is the constructor for the oaVerilogTest.
// *****************************************************************************
oaVerilogTest::oaVerilogTest(const oaString	&name)
: oaUnitTest(name),
  pathToData(".")
{
}



// *****************************************************************************
// oaVerilogTest::~oaVerilogTest
//
// This is the destructor for the oaVerilogTest.
// *****************************************************************************
oaVerilogTest::~oaVerilogTest()
{
    oaIter<oaDesign>	designIter(oaDesign::getOpenDesigns());

    while (oaDesign *design = designIter.getNext()) {
	if (design->isValid()) {
	    design->purge();
	}
    }
}



// *****************************************************************************
// oaVerilogTest::preTest()
//
// This function makes preparations before the test is run.  This includes
// copying the input files.
// *****************************************************************************
void
oaVerilogTest::preTest()
{
    if (copyRefFiles) {
	oaString    input   = getName()	+ ".v";
	oaString    tmp;
	getRelPath(input, tmp);

	if (!tmp.isEmpty() && tmp != input) {
	    copyFile(tmp, input);
	}
    }
}



// *****************************************************************************
// oaVerilogTest::setPathToData()
//
// This function sets the path to the test data to the path given by dirName.
// *****************************************************************************
void
oaVerilogTest::setPathToData(const oaString &dirName)
{
    if (!dirName.isEmpty()) {
	pathToData = dirName;
    }

    if (!isDir(pathToData)) {
	fprintf(stderr,	"Warning: Directory not	found: \"%s\".\n",
	    (const char*) pathToData);
	pathToData = ".";
    }
}



// *****************************************************************************
// oaVerilogTest::isDir()
//
// This function returns a boolean indicating whether the given	path specifies
// a directory on disk or not. The value retured is true if the directory 
// exists or false if it doesn't.
// *****************************************************************************
oaBoolean
oaVerilogTest::isDir(const oaString &path)
{
    return oaFSComponent(path).isDir();
}



// *****************************************************************************
// oaVerilogTest::isFile()
//
// This function returns a boolean indicating whether the given	path specifies
// a file on disk or not.  The value retured is true if the file exists or 
// false if it doesn't or if the path specifies a directory.
// *****************************************************************************
oaBoolean
oaVerilogTest::isFile(const oaString	&path)
{
    return oaFSComponent(path).isFile();
}



// *****************************************************************************
// oaVerilogTest::cleanup()
//
// This method removes data produced by	this test.  All open designs are purged.
// The given library is removed from the library server and the library is
// removed from the file system.
// *****************************************************************************
void
oaVerilogTest::cleanup(const oaString	&myLibName)
{
    oaDesign		*design;
    oaIter<oaDesign>	designIter(oaDesign::getOpenDesigns());

    while (design = designIter.getNext()) {
	design->purge();
    }

    oaScalarName    myLibN(vns, myLibName);
    oaLib	    *lib = oaLib::find(myLibN);
    oaString	    libPath;

    if (lib) {
	lib->getPath(libPath);
	LibMgr::close(lib);
    } else {
	libPath = myLibName;
    }

    oaDir   libDir(libPath);

    if (libDir.exists()) {
	libDir.destroy();
    }

    oaFile  libDefs("lib.defs");

    if (libDefs.exists()){
	libDefs.destroy();
    }
}



// *****************************************************************************
// oaVerilogTest::openLib()
//
// This function opens a test library.
// *****************************************************************************
void
oaVerilogTest::openLib(const oaString	&libNameStr)
{
    LibMgrOptions   defaultOptions;
    oaScalarName    myLibName(vns, libNameStr);

    if (oaLib::find(myLibName) || oaLib::exists(libNameStr)) {
	LibMgr::append(myLibName, defaultOptions);
    } else {
	LibMgr::create(oaScalarName(vns, libNameStr), libNameStr, 
		       defaultOptions);
    }
}