redef.ref

来自「openaccess与verilog互相转化时所用的源代码」· REF 代码 · 共 212 行

******************************************************************************
* No Explode, No EMH
******************************************************************************
Contents of redef_design.leaf.netlist
    Contents of TOP module leaf
            Term: 'in' (ModScalarTerm)
        	TermType:	input
        	NumBits:	1
        	Net:		'in'
        	Position:	0
            Term: 'out' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'out'
        	Position:	1
            Net: 'in' (ModScalarNet)
            Net: 'out' (ModScalarNet)



Contents of redef_design.xyz.netlist
    Contents of TOP module xyz
            Term: 'a' (ModScalarTerm)
        	TermType:	input
        	NumBits:	1
        	Net:		'a'
        	Position:	0
            Term: 'b' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'b'
        	Position:	1
            Net: 'a' (ModScalarNet)
            Net: 'b' (ModScalarNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	LibName:		redef_design
        	CellName:		leaf
        	ViewName:		netlist
        	Master Cell Name:	leaf
        	NumBits:		1
        ModInstTerm:
        	Net:	a
        	Inst:	I1
        	Term:	in (bound to 'in')
        ModInstTerm:
        	Net:	b
        	Inst:	I1
        	Term:	out (bound to 'out')



Contents of redef_design.xyz.netlist
    Contents of TOP module xyz
            Term: 'a' (ModScalarTerm)
        	TermType:	input
        	NumBits:	1
        	Net:		'a'
        	Position:	0
            Term: 'b' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'b'
        	Position:	1
            Net: 'a' (ModScalarNet)
            Net: 'b' (ModScalarNet)
            Net: 'c' (ModScalarNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	LibName:		redef_design
        	CellName:		leaf
        	ViewName:		netlist
        	Master Cell Name:	leaf
        	NumBits:		1
        ModInst:
        	Is Bound:		yes
        	InstName:		I2
        	LibName:		redef_design
        	CellName:		leaf
        	ViewName:		netlist
        	Master Cell Name:	leaf
        	NumBits:		1
        ModInstTerm:
        	Net:	a
        	Inst:	I1
        	Term:	in (bound to 'in')
        ModInstTerm:
        	Net:	b
        	Inst:	I2
        	Term:	out (bound to 'out')
        ModInstTerm:
        	Net:	c
        	Inst:	I2
        	Term:	in (bound to 'in')
        ModInstTerm:
        	Net:	c
        	Inst:	I1
        	Term:	out (bound to 'out')



Contents of redef_design.top.netlist
    Contents of TOP module top
            Net: 'x' (ModScalarNet)
            Net: 'y' (ModScalarNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		u0
        	LibName:		redef_design
        	CellName:		xyz
        	ViewName:		netlist
        	Master Cell Name:	xyz
        	NumBits:		1
        ModInstTerm:
        	Net:	x
        	Inst:	u0
	Posit:	0 (bound to 'a')
        ModInstTerm:
        	Net:	y
        	Inst:	u0
	Posit:	1 (bound to 'b')



Reader succeeded



******************************************************************************
* No Explode, EMH
******************************************************************************
Info: The top module is top
Contents of redef_designEMH.top.netlist
    Contents of module leaf
            Term: 'out' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'out'
        	Position:	1
            Term: 'in' (ModScalarTerm)
        	TermType:	input
        	NumBits:	1
        	Net:		'in'
        	Position:	0
            Net: 'out' (ModScalarNet)
            Net: 'in' (ModScalarNet)
    Contents of module xyz
            Term: 'b' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'b'
        	Position:	1
            Term: 'a' (ModScalarTerm)
        	TermType:	input
        	NumBits:	1
        	Net:		'a'
        	Position:	0
            Net: 'c' (ModScalarNet)
            Net: 'b' (ModScalarNet)
            Net: 'a' (ModScalarNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I2
        	Master Cell Name:	leaf
        	NumBits:		1
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	Master Cell Name:	leaf
        	NumBits:		1
        ModInstTerm:
        	Net:	c
        	Inst:	I2
        	Term:	in (bound to 'in')
        ModInstTerm:
        	Net:	c
        	Inst:	I1
        	Term:	out (bound to 'out')
        ModInstTerm:
        	Net:	b
        	Inst:	I2
        	Term:	out (bound to 'out')
        ModInstTerm:
        	Net:	a
        	Inst:	I1
        	Term:	in (bound to 'in')
    Contents of TOP module top
            Net: 'y' (ModScalarNet)
            Net: 'x' (ModScalarNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		u0
        	Master Cell Name:	xyz
        	NumBits:		1
        ModInstTerm:
        	Net:	y
        	Inst:	u0
	Posit:	1 (bound to 'b')
        ModInstTerm:
        	Net:	x
        	Inst:	u0
	Posit:	0 (bound to 'a')



Reader succeeded