globalconn.ref

openaccess与verilog互相转化时所用的源代码

******************************************************************************
* No Explode, No EMH
******************************************************************************
Contents of globalConn_design.globals.netlist
    Contents of TOP module globals
            Net: 'globalNet' (ModScalarNet)



Contents of globalConn_design.level1.netlist
    Contents of TOP module level1
            Term: 'l1_in[31:0]' (ModBusTerm)
        	TermType:	input
        	NumBits:	32
        	Net:		'l1_in[31:0]'
        	Position:	0
            Term: 'l1_out' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'l1_out'
        	Position:	1
            Net: 'l1_in[31:0]' (ModBusNet)
            Net: 'l1_out' (ModScalarNet)
            Net: 'l1_reg' (ModScalarNet)



Contents of globalConn_design.level2A.netlist
    Contents of TOP module level2A
            Term: 'l2Aio[1:0]' (ModBusTerm)
        	TermType:	inputOutput
        	NumBits:	2
        	Net:		'l2Aio[1:0]'
        	Position:	0
            Net: 'l2Aio[1:0]' (ModBusNet)
            Net: '31*tie0,tie1' (ModBundleNet)
            Net: 'tie0' (ModScalarNet)
            SigType:	tieLo
            Global:	true
            Net: 'tie1' (ModScalarNet)
            SigType:	tieHi
            Global:	true
            Net: 'globalNet' (ModScalarNet)
            Global:	true
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	LibName:		globalConn_design
        	CellName:		level1
        	ViewName:		netlist
        	Master Cell Name:	level1
        	NumBits:		1
        ModInstTerm:
        	Net:	31*tie0,tie1
        	Inst:	I1
	Posit:	0 (bound to 'l1_in[31:0]')
        ModInstTerm:
        	Net:	globalNet
        	Inst:	I1
	Posit:	1 (bound to 'l1_out')



Contents of globalConn_design.level2B.netlist
    Contents of TOP module level2B
            Term: 'l2Bio[1:0]' (ModBusTerm)
        	TermType:	inputOutput
        	NumBits:	2
        	Net:		'l2Bio[1:0]'
        	Position:	0
            Net: 'l2Bio[1:0]' (ModBusNet)
            Net: 'tie1,31*tie0' (ModBundleNet)
            Net: 'tie1' (ModScalarNet)
            SigType:	tieHi
            Global:	true
            Net: 'tie0' (ModScalarNet)
            SigType:	tieLo
            Global:	true
            Net: 'globalNet' (ModScalarNet)
            Global:	true
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	LibName:		globalConn_design
        	CellName:		level1
        	ViewName:		netlist
        	Master Cell Name:	level1
        	NumBits:		1
        ModInstTerm:
        	Net:	tie1,31*tie0
        	Inst:	I1
	Posit:	0 (bound to 'l1_in[31:0]')
        ModInstTerm:
        	Net:	globalNet
        	Inst:	I1
	Posit:	1 (bound to 'l1_out')



Contents of globalConn_design.top.netlist
    Contents of TOP module top
            Net: 'tie1,tie0' (ModBundleNet)
            Net: 'tie1' (ModScalarNet)
            SigType:	tieHi
            Global:	true
            Net: 'tie0' (ModScalarNet)
            SigType:	tieLo
            Global:	true
            Net: 'tie0,tie1' (ModBundleNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I1A
        	LibName:		globalConn_design
        	CellName:		level2A
        	ViewName:		netlist
        	Master Cell Name:	level2A
        	NumBits:		1
        ModInst:
        	Is Bound:		yes
        	InstName:		I2B
        	LibName:		globalConn_design
        	CellName:		level2B
        	ViewName:		netlist
        	Master Cell Name:	level2B
        	NumBits:		1
        ModInstTerm:
        	Net:	tie1,tie0
        	Inst:	I1A
	Posit:	0 (bound to 'l2Aio[1:0]')
        ModInstTerm:
        	Net:	tie0,tie1
        	Inst:	I2B
	Posit:	0 (bound to 'l2Bio[1:0]')



Reader succeeded



******************************************************************************
* No Explode, EMH
******************************************************************************
Info: The top module is top
Contents of globalConn_designEMH.top.netlist
    Contents of module level1
            Term: 'l1_out' (ModScalarTerm)
        	TermType:	output
        	NumBits:	1
        	Net:		'l1_out'
        	Position:	1
            Term: 'l1_in[31:0]' (ModBusTerm)
        	TermType:	input
        	NumBits:	32
        	Net:		'l1_in[31:0]'
        	Position:	0
            Net: 'l1_reg' (ModScalarNet)
            Net: 'l1_out' (ModScalarNet)
            Net: 'l1_in[31:0]' (ModBusNet)
    Contents of module level2A
            Term: 'l2Aio[1:0]' (ModBusTerm)
        	TermType:	inputOutput
        	NumBits:	2
        	Net:		'l2Aio[1:0]'
        	Position:	0
            Net: 'globalNet' (ModScalarNet)
            Global:	true
            Net: 'tie1' (ModScalarNet)
            SigType:	tieHi
            Global:	true
            Net: 'tie0' (ModScalarNet)
            SigType:	tieLo
            Global:	true
            Net: '31*tie0,tie1' (ModBundleNet)
            Net: 'l2Aio[1:0]' (ModBusNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	Master Cell Name:	level1
        	NumBits:		1
        ModInstTerm:
        	Net:	globalNet
        	Inst:	I1
	Posit:	1 (bound to 'l1_out')
        ModInstTerm:
        	Net:	31*tie0,tie1
        	Inst:	I1
	Posit:	0 (bound to 'l1_in[31:0]')
    Contents of module level2B
            Term: 'l2Bio[1:0]' (ModBusTerm)
        	TermType:	inputOutput
        	NumBits:	2
        	Net:		'l2Bio[1:0]'
        	Position:	0
            Net: 'globalNet' (ModScalarNet)
            Global:	true
            Net: 'tie0' (ModScalarNet)
            SigType:	tieLo
            Global:	true
            Net: 'tie1' (ModScalarNet)
            SigType:	tieHi
            Global:	true
            Net: 'tie1,31*tie0' (ModBundleNet)
            Net: 'l2Bio[1:0]' (ModBusNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I1
        	Master Cell Name:	level1
        	NumBits:		1
        ModInstTerm:
        	Net:	globalNet
        	Inst:	I1
	Posit:	1 (bound to 'l1_out')
        ModInstTerm:
        	Net:	tie1,31*tie0
        	Inst:	I1
	Posit:	0 (bound to 'l1_in[31:0]')
    Contents of TOP module top
            Net: 'tie0,tie1' (ModBundleNet)
            Net: 'tie0' (ModScalarNet)
            SigType:	tieLo
            Global:	true
            Net: 'tie1' (ModScalarNet)
            SigType:	tieHi
            Global:	true
            Net: 'tie1,tie0' (ModBundleNet)
        ModInst:
        	Is Bound:		yes
        	InstName:		I2B
        	Master Cell Name:	level2B
        	NumBits:		1
        ModInst:
        	Is Bound:		yes
        	InstName:		I1A
        	Master Cell Name:	level2A
        	NumBits:		1
        ModInstTerm:
        	Net:	tie0,tie1
        	Inst:	I2B
	Posit:	0 (bound to 'l2Bio[1:0]')
        ModInstTerm:
        	Net:	tie1,tie0
        	Inst:	I1A
	Posit:	0 (bound to 'l2Aio[1:0]')



Reader succeeded