outoptions.ref

openaccess与verilog互相转化时所用的源代码

// Verilog file for cell "top" view "netlist" 
// Language Version: custom 

// **************************************************************
// Module top of outOptionsLib.top.netlist
// **************************************************************
module top ();

                wire a;
                wire b;

                leaf1 I4 (
                                                .in(a),
                                                .out(b));
                leaf2 I5 (
                                                .in(a),
                                                .out(b));
endmodule // top


// This file contains the Verilog leaf cells for outOptionsLib.top.netlist
// Language Version: custom 

// **************************************************************
// Module leaf1 of leafLib.leaf1.abstract
// **************************************************************
module leaf1 (
                in,
                out);

                input in;
                output out;

endmodule // leaf1


// **************************************************************
// Module leaf2 of leafLib.leaf2.abstract
// **************************************************************
module leaf2 (
                in,
                out);

                input in;
                output out;

endmodule // leaf2