gnumakefile

openaccess与verilog互相转化时所用的源代码

# ******************************************************************************
# ******************************************************************************
# This makefile contains the rules for building the oaVerilogInTest program.
#
# ******************************************************************************
# Except as specified in the OpenAccess terms of use of Cadence or Silicon
# Integration Initiative, this material may not be copied, modified,
# re-published, uploaded, executed, or distributed in any way, in any medium,
# in whole or in part, without prior written permission from Cadence.
#
#                Copyright 2003-2005 Cadence Design Systems, Inc.
#                           All Rights Reserved.
#
#  $Author: abw $
#  $Revision: 1.20 $
#  $Date: 2005/08/01 14:39:59 $
# ******************************************************************************
# ******************************************************************************

ROOT		= ..

include $(ROOT)/build.variables

default : all

TEST_NAME	:= oaVerilogTest
OA_DIR		:= $(ROOT)/../oa
OA_LIB_DIR	:= $(OA_DIR)/lib/$(SYSNAME)/$(OPTMODE)
PROJ_INCLUDES	:=  -I../src -I../lib/$(SYSNAME)/$(OPTMODE) \
		    -I$(OA_DIR)/test/unit \
		    -I$(PROD_DIR)/include/oa \
                    -I$(TOOL_INCLUDE_DIR) -I$(PROD_DIR)/include/oaVerilog


# ******************************************************************************
# Define the object directory and how to get to the unitTest argchice.
# ******************************************************************************
TOOL_BIN_DIR	:= bin/$(SYSNAME)/$(OPTMODE)
OBJ_ROOT	:= lib
OBJDIR		:= $(OBJ_ROOT)/$(SYSNAME)/$(OPTMODE)
dummy		:= $(shell [ -d $(OBJDIR) ] || $(MKDIR) $(OBJDIR))

include $(OA_DIR)/unitTest.variables


# ******************************************************************************
# Define the program
# ******************************************************************************
PROG_NAME	:= $(TEST_NAME)
PROG_RULE	:= $(PROG_NAME)
PROG_LDPATH	:= $(PROD_LIB_DIR)
PROG_LDLIBS	:= $(UNITTEST_LIB) $(SYS_LIBS)
PROG_LDNAMES	:=  oaVerilog$(OPTCHAR) \
		    oaBase$(OPTCHAR) \
		    oaDM$(OPTCHAR) \
		    oaPlugIn$(OPTCHAR) \
		    oaTech$(OPTCHAR) \
		    oaDesign$(OPTCHAR) \
		    oaWafer$(OPTCHAR) \
		    oaUtil$(OPTCHAR) \
		    oaCommon$(OPTCHAR)
PROG_SRC	:= $(wildcard *.cpp)
PROG_INST_BINDIR:= $(PROD_BIN_DIR)

include $(CONFIG_ROOT)/program.rules

include $(ROOT)/build.rules


# ******************************************************************************
# Define the rules to run the unitTest
# ******************************************************************************
TEST_EXE	= $(TEST_NAME)$(LIBTYPE)
TEST_BINDIR     = $(PROD_BIN_DIR)
TEST_DATADIR0	= testDir/$(SYSNAME)
TEST_DATADIR    = $(TEST_DATADIR0)/$(OPTMODE)
TEST_LOG_F	= $(TEST_NAME).log

ifneq ($(PURE),)
  TEST_EXE := $(TEST_NAME).$(PURE)
endif

unitTest:
	@if [ ! -d $(TEST_DATADIR0) ]; then \
	    mkdir $(TEST_DATADIR0); \
	fi
	@if [ ! -d $(TEST_DATADIR) ]; then \
	    mkdir $(TEST_DATADIR); \
	else \
	    rm -rf $(TEST_DATADIR)/*; \
	fi
	$(WHISPER) \
	$(PLAF_LD_LIB_PATH)="$($(PLAF_LD_LIB_PATH)):$(CURDIR)/$(PROD_LIB_DIR)"; \
	export $(PLAF_LD_LIB_PATH); \
	PATH="$(CURDIR)/$(PROD_BIN_DIR):$(PATH)"; \
	export PATH; \
	$(ECHO) "*** Running $(TEST_EXE) using $(TEST_BINDIR)/$(TEST_EXE)"; \
	if $(TEST_BINDIR)/$(TEST_EXE) -dir $(TEST_DATADIR) -copyRefs; then \
	    $(ECHO) ".. PASSED"; \
	    grep Failed $(TEST_DATADIR)/$(TEST_LOG_F); \
	    exit 0; \
	elif [ -r $(TEST_DATADIR)/$(TEST_LOG_F) ]; then \
	    $(ECHO) ".. FAILED"; \
	    grep -n Failed $(TEST_DATADIR)/$(TEST_LOG_F); \
	else \
	    $(ECHO) ".. FAILED"; \
	    $(ECHO) "Unable to find $(TEST_DATADIR)/$(TEST_LOG_F)"; \
	fi