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📄 oaverilogcallbacksout.h

📁 openaccess与verilog互相转化时所用的源代码
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// *****************************************************************************// *****************************************************************************// oaVerilogCallbacksOut.h//// This class deals with the Verilog syntax itself. It derives from the// abstract class WriterCallback which provides a skeleton for a// netlist writer.// // *****************************************************************************// Except as specified in the OpenAccess terms of use of Cadence or Silicon// Integration Initiative, this material may not be copied, modified,// re-published, uploaded, executed, or distributed in any way, in any medium,// in whole or in part, without prior written permission from Cadence.////                Copyright 2002-2005 Cadence Design Systems, Inc.//         (c) Copyright 2003 Hewlett-Packard Development Company, LP//                           All Rights Reserved.////  $Author: shaun $//  $Revision: 1.24 $//  $Date: 2005/05/19 00:48:48 $//  $State: Exp $// *****************************************************************************// *****************************************************************************#ifndef oaVerilogCallbacksOut_P#define oaVerilogCallbacksOut_PBEGIN_VERILOG_NAMESPACE// *****************************************************************************// VerilogTerms// *****************************************************************************typedef std::vector<oaModTerm*>		    VerilogTerms;typedef std::vector<oaModTerm*>::iterator   TermIter;// *****************************************************************************// VerilogInstTerms// *****************************************************************************typedef std::vector<oaModInstTerm*>		VerilogInstTerms;typedef std::vector<oaModInstTerm*>::iterator   InstTermIter;// *****************************************************************************// NetExprType// *****************************************************************************enum NetExprType {    NameOneTicBOne,    NameOneTicBZero,    NameIsNumber,    NameIsNet};// *****************************************************************************// CallbacksOut// *****************************************************************************class OA_VERILOG_DLL_API CallbacksOut : public WriterCallback {  public:			    CallbacksOut(OptionsOut	&optIn,					 const oaString	*version = NULL);    virtual		    ~CallbacksOut();    virtual void	    writeCell(oaModule  &cell);  protected:    virtual void	    writeModule(oaModule    &cell);    virtual void	    writePortList(oaModule  &cell);    virtual void	    writePortAlias(const oaString &portID,					   const oaString &netExpr) const;    virtual void	    writePort(const oaString &portID) const;    virtual void	    writeInterface(oaModule &cell);    virtual void	    writeWire(oaModule  &cell);    virtual void	    writeBody(oaModule  &cell);    virtual void	    writeEndModule(oaModule &cell);        virtual void	    writeAssignments(oaModule   &cell);     virtual void	    writeLocalAssignments(oaModBitNet	*net,						  oaBoolean	&first);     virtual void	    writeBusNumAssignment(oaModBusNetDef    *bus,						  oaBoolean	    &first);    virtual void	    writeAssignment(const oaString  &equNetName,					    const oaString  &fromNetName,					    oaBoolean	    &first);    virtual void	    writeInstConnections(oaModule   &cell,						 oaModInst  *inst);    virtual void	    writeConns(ConnectionList	&connList);    virtual void	    writeConnsByPosition(ConnectionList	&connList);    virtual void	    writeBoundInstConnections(oaModInst	&inst);    virtual void	    writeUnboundInstConnections();    virtual void	    writeHierConn(const oaString    &portID,					  const oaString    &netExpr) const;    virtual void	    writeHierConn(const oaString    &netExpr) const;    virtual void	    writePortDeclarationsSection();    virtual void	    writePortDeclaration(oaModTerm  *term,						 oaString   &termName);    virtual void	    writePortNetDeclaration(oaTermTypeEnum  termType,						    oaModNet	    *net,						    oaString	    &netName);    virtual void	    orderTerms(oaModule &cell);    virtual void	    orderInstTerms(const oaModInst &inst);    virtual void	    markInstTermPrinted(oaModInstTerm	*iterm);    virtual oaBoolean	    testProduceTerm(const oaModTerm *term) const;    virtual oaBoolean	    testProduceInstTerm(const oaModInstTerm *iterm) const;    virtual oaBoolean	    getNextPortNet(TermIter &termIter,					   oaString &portID,					   oaString &netExp);    virtual oaBoolean	    getNextPortNet(InstTermIter	&itermIter,					   Connection	&connection);    virtual oaBoolean	    getInstTermName(const oaModInstTerm	*iterm,					    oaString		&portID);    virtual void	    getTermName(const oaModTerm	*term,					oaName		&name);    virtual void	    getNetName(const oaModNet	*net,				       oaName		&netName);    virtual void	    nameToPortID(const oaName	&name,					 oaString	&portID);    virtual oaBoolean	    collectTerms(TermIter  &termIter,					 oaString   &portID,					 oaString   &netExpr);    virtual void	    addToBundle(const oaName	&src,					oaName		&dest);    virtual void	    appendToName(const oaName	&src,					 oaName		&dest);    virtual void	    binEquivNets(oaModBitNet		*net,					 std::set<oaModBitNet*>	&inputs,					 std::set<oaModBitNet*>	&outputs) const;    virtual void	    combineBitWithBit(const oaVectorBitName *src,					      oaName		    &dest);    virtual void	    combineBitWithVector(const oaVectorBitName	*src,					         oaName			&dest);    virtual oaBoolean	    collectInstTerms(InstTermIter   &termIter,					     Connection	    &connection);    virtual NetExprType     getNetExpr(oaModNet		*net,				       oaString		&netExpr,				       oaBoolean	addPrefix = true);    virtual NetExprType     getNetExpr(oaModScalarNet	*net,				       oaString		&netExpr);    virtual NetExprType     getNetExpr(oaModBusNet	*net,				       oaString		&netExpr);    virtual NetExprType     getNetExpr(oaModBusNetBit   *net,				       oaString		&netExpr);    virtual NetExprType	    getNetExpr(oaModBundleNet	*net,				       oaString		&netExpr);    virtual NetExprType	    nameToNetExpr(const	oaName	&name,					  oaString	&netExpr,					  oaModule	*module,					  oaBoolean	isGlobal = false,					  oaSigTypeEnum	sigType = oacSignalSigType);    virtual NetExprType	    bundleToNetExpr(const oaBundleName	&bundle,					    oaString		&netExpr,					    oaModule		*module);    virtual void	    initConcat(const NetExprType	memType,				       const oaString		&memExpr,				       const oaUInt4		repeat,				       oaString			&netExpr,				       oaString			&numExpr,				       oaUInt4			&nbits,				       NetExprType		&lastType,				       oaBoolean		&addedSep) const;    virtual void	    combineMembers(const NetExprType	currentType,					   NetExprType		&lastType,					   const oaString	&memExpr,					   oaString		&netExpr,					   oaString		&numExpr,					   const oaUInt4	repeat,					   oaUInt4		&nbits,					   oaBoolean		&addedSep) const;    virtual void	    addNumPrefix(oaString   &numExpr,					 oaString   &netExpr,					 oaUInt4    nbits,					 oaBoolean  addedSep) const;    virtual oaBoolean	    getBusNetDecl(oaModBusNetDef    *netDef,					  oaString	    &name);    virtual void	    busNameToDecl(const oaVectorName	&name,					  oaString		&decl) const;    virtual oaString	    numBits(const oaString  &binaryString) const;    virtual oaString	    intToStr(oaUInt4 bits) const;    virtual oaBoolean	    isInput(oaModBitNet	*net) const;    virtual oaBoolean	    isBusNumAssignment(oaModBusNetDef	*bus) const;    virtual oaBoolean	    isTieHigh(const oaModBitNet	*net) const;    virtual oaBoolean	    isTieHigh(const oaString	&netExpr,				      const oaBoolean	isGlobal,				      const oaSigType	&sigType) const;    virtual oaBoolean	    isTieLow(const oaModBitNet	*net) const;    virtual oaBoolean	    isTieLow(const oaString	&netExpr,				     const oaBoolean	isGlobal,				     const oaSigType	&sigType) const;    oaNativeNS		    nativeNS;    oaVerilogNS		    verNS;    oaModule		    *globalCell;    oaString		    globalCellName;    VerilogTerms	    terms;    VerilogInstTerms	    iterms;    oaIntAppDef<oaModBusTermDef>    *busTermPrinted;    oaIntAppDef<oaModTerm>	    *termPrinted;    oaIntAppDef<oaModBusNetDef>     *busNetPrinted;    oaIntAppDef<oaModNet>	    *netPrinted;    oaIntAppDef<oaModInstTerm>	    *itermPrinted;    oaIntAppDef<oaModTerm>	    *termPosition;    oaString		    tieHighNetStr;    oaString		    tieLowNetStr;    oaModNet		    *tieHighNet;    oaModNet		    *tieLowNet;    OptionsOut		    &options;    static const oaString   languageName;    static const oaString   languageVersion;    static const oaString   commentPrefix;    static const oaString   commentSuffix;    static const oaString   moduleKeyword;    static const oaString   endModuleKeyword;    static const oaString   assignKeyword;    static const oaString   inputKeyword;    static const oaString   outputKeyword;    static const oaString   inoutKeyword;    static const oaString   supply0Keyword;    static const oaString   supply1Keyword;    static const oaString   wireKeyword;    static const oaString   binaryPrefix;    static const oaString   oneTicBOne;    static const oaString   oneTicBZero;    static const oaString   hierSep;    static const oaString   concatPrefix;    static const oaString   concatSep;    static const oaString   concatSuffix;    static const oaString   rangePrefix;    static const oaString   rangeSep;    static const oaString   rangeSuffix;    static const oaString   escapePrefix;    static const oaString   escapeSuffix;};END_VERILOG_NAMESPACE#endif

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