oaverilogcmpterms.cpp

openaccess与verilog互相转化时所用的源代码

// *****************************************************************************
// *****************************************************************************
// oaVerilogCmpTerms.cpp
//
// This file contains the implementation for the CmpTerms and CmpTermNames
// functor classes.
//
// *****************************************************************************
// Except as specified in the OpenAccess terms of use of Cadence or Silicon
// Integration Initiative, this material may not be copied, modified,
// re-published, uploaded, executed, or distributed in any way, in any medium,
// in whole or in part, without prior written permission from Cadence.
//
//		  Copyright 2003-2005 Cadence Design Systems, Inc.
//			     All Rights	Reserved.
//
//  $Author: shaun $
//  $Revision: 1.18 $
//  $Date: 2005/07/09 02:11:36 $
//  $State: Exp $
// *****************************************************************************
// *****************************************************************************



#include "oaVerilogInPvt.h"

BEGIN_VERILOG_NAMESPACE



// *****************************************************************************
// CmpTermNames::CmpTermNames()
//
// This function is the constructor for the CmpTermNames class.
// *****************************************************************************
CmpTermNames::CmpTermNames()
{
}



// *****************************************************************************
// CmpTermNames::cmpNames()
//
// This function is the comparison operator for terminals by name. The primary
// key is the scalar name (or base name for bus and bus bit terminals).  If one
// of the terminals is a bus term bit, then the index of the bit is used as a
// secondary key.  If both terminals are vector names then the entire name
// (range and all) is used as the only key.
// *****************************************************************************
bool
CmpTermNames::cmpNames(oaBitOrder   order)
{
    oaUInt4	leftIndex = 0;
    oaUInt4	rightIndex = 0;

    switch (leftName.getType()) {
      case oacScalarNameType:
	leftName.get(vns, leftNameStr);

	switch (rightName.getType()) {
	  case oacScalarNameType:
	    rightName.get(vns, rightNameStr);
	    break;

	  case oacVectorNameType:
	    rightName.getVector()->getBaseName(vns, rightNameStr);
	    break;

	  case oacVectorBitNameType:
	    rightName.getVectorBit()->getBaseName(vns, rightNameStr);
	    break;

	  case oacBundleNameType:
	    {
		oaNativeNS  native;

		rightName.get(native, rightNameStr);
	    }
	    break;
	}
	break;

      case oacBundleNameType:
	{
	    oaNativeNS	native;

	    leftName.get(native, leftNameStr);
	    rightName.get(native, rightNameStr);
	}
	break;

      case oacVectorNameType:
	switch (rightName.getType()) {
	  case oacScalarNameType:
	    leftName.getVector()->getBaseName(vns, leftNameStr);
	    rightName.get(vns, rightNameStr);
	    break;

	  case oacVectorNameType:
	    leftName.get(vns, leftNameStr);
	    rightName.get(vns, rightNameStr);
	    break;

	  case oacVectorBitNameType:
	    leftName.get(vns, leftNameStr);
	    rightName.get(vns, rightNameStr);
	    break;

	  case oacBundleNameType:
	    {
		oaNativeNS  native;

		leftName.get(native, leftNameStr);
		rightName.get(native, rightNameStr);
	    }
	    break;
	}
	break;

      case oacVectorBitNameType:
	switch (rightName.getType()) {
	  case oacScalarNameType:
	    leftName.getVectorBit()->getBaseName(vns, leftNameStr);
	    rightName.get(vns, rightNameStr);
	    break;

	  case oacVectorNameType:
	    leftName.get(vns, leftNameStr);
	    rightName.get(vns, rightNameStr);
	    break;

	  case oacVectorBitNameType:
	    leftName.getVectorBit()->getBaseName(vns, leftNameStr);
	    rightName.getVectorBit()->getBaseName(vns, rightNameStr);
	    leftIndex = leftName.getVectorBit()->getIndex();
	    rightIndex = rightName.getVectorBit()->getIndex();
	    break;

	  case oacBundleNameType:
	    {
		oaNativeNS  native;

		leftName.get(native, leftNameStr);
		rightName.get(native, rightNameStr);
	    }
	    break;
	    
	}
	break;
    }    
    
    Options::stripGeneratedPrefix(leftNameStr);
    Options::stripGeneratedPrefix(rightNameStr);

    if (leftNameStr == rightNameStr) {
	return order == oacAscendingBitOrder ? leftIndex < rightIndex 
					     : leftIndex > rightIndex;
    }
    
    return leftNameStr < rightNameStr ? true : false;
}



// *****************************************************************************
// CmpTerms::operator()()
//
// This function is the comparison operator for oaModTerms used by the 
// std::sort method to order terminals. The primary key is the position of the
// terminals. The secondary key is the isInterface state of the terminals.
// Terminals that are part of the original interface will appear before
// terminals that were not part of the original interface. The name of the
// terminal is the tertiary key.
// *****************************************************************************
bool
CmpTerms::operator()(oaModTerm	*left, 
		     oaModTerm	*right)
{
    oaBoolean	leftHasIndex = left->getPosition() != oacNullIndex;
    oaBoolean	rightHasIndex = right->getPosition() != oacNullIndex;

    if (leftHasIndex && rightHasIndex) {
	oaUInt4	leftIndex = left->getPosition();
	oaUInt4	rightIndex = right->getPosition();
	oaInt4	indexResult = leftIndex - rightIndex;

	if (indexResult != 0) {
	    return indexResult < 0;
	}
    } else if (leftHasIndex && !rightHasIndex) {
	return true;
    } else if (!leftHasIndex && rightHasIndex) {
	return false;
    }

    if (left->isInterface() && !right->isInterface()) {
	return true;
    } if (!left->isInterface() && right->isInterface()) {
	return false;
    }

    left->getName(leftName);
    right->getName(rightName);

    oaBitOrder	order = oacNoneBitOrder;

    if (left->getType() == oacModBusTermType 
	&& right->getType() == oacModBusTermType) {
	oaModBusTermDef	*leftDef = ((oaModBusTerm*) left)->getDef();
	oaModBusTermDef *rightDef = ((oaModBusTerm*) right)->getDef();

	if (leftDef == rightDef) {
	    order = leftDef->getBitOrder();
	}
    }

    return cmpNames(order);
}



// *****************************************************************************
// CmpInstTerms::operator()()
//
// This function is the comparison operator for oaModInstTerms used by the
// std::sort function to order terminals. For bound InstTerms, the primary key
// is the position of the master terminal, the secondary key is the isInterface
// state of the terminal and the tertiary key is the name of the  terminal. For 
// unbound InstTerms the only key is the name of the terminal.
// *****************************************************************************
bool
CmpInstTerms::operator()(oaModInstTerm	*left, 
			 oaModInstTerm  *right)
{
    oaBoolean	leftHasIdx; 

    if (left->usesTermPosition()
	|| (left->getTerm() && left->getTerm()->getPosition() != oacNullIndex)) {
	leftHasIdx = true;
    } else {
	leftHasIdx = false;
    }

    oaBoolean	rightHasIdx;
    
    if (right->usesTermPosition()
	|| (right->getTerm() && right->getTerm()->getPosition() != oacNullIndex)) {
	rightHasIdx = true;
    } else {
	rightHasIdx = false;
    }

    if (leftHasIdx && rightHasIdx) {
	oaUInt4	leftIndex = left->usesTermPosition() ? left->getTermPosition() 
			    : left->getTerm()->getPosition();
	oaUInt4	rightIndex = right->usesTermPosition() ? right->getTermPosition()
			     : right->getTerm()->getPosition();
	oaInt4	indexResult = leftIndex - rightIndex;

	if (indexResult != 0) {
	    return indexResult < 0;
	}
    } else if (leftHasIdx && !rightHasIdx) {
	return true;
    } else if (!leftHasIdx && rightHasIdx) {
	return false;
    }

    oaBoolean	leftIsInterface = left->isBound() ? left->getTerm()->isInterface() 
						  : false;
    oaBoolean	rightIsInterface = right->isBound() ? right->getTerm()->isInterface() 
						    : false;

    if (leftIsInterface && !rightIsInterface) {
	return true;
    } else if (!leftIsInterface && rightIsInterface) {
	return false;
    }

    left->getTermName(leftName);
    right->getTermName(rightName);

    oaBitOrder	order = oacNoneBitOrder;

    if (left->isBound() && right->isBound()
	&& left->getTerm()->getType() == oacModBusTermType
	&& right->getTerm()->getType() == oacModBusTermType) {

	oaModBusTerm	*leftTerm = (oaModBusTerm*) left->getTerm();
	oaModBusTerm	*rightTerm = (oaModBusTerm*) right->getTerm();
	oaModBusTermDef *leftDef = ((oaModBusTerm*) leftTerm)->getDef();
	oaModBusTermDef *rightDef = ((oaModBusTerm*) rightTerm)->getDef();

	if (leftDef == rightDef) {
	    order = leftDef->getBitOrder();
	}
    }

    return cmpNames(order);
}



END_VERILOG_NAMESPACE