oaverilogcallbacksin.cpp

openaccess与verilog互相转化时所用的源代码

// *****************************************************************************
// CallbacksIn::getInst()
//
// This function finds or creates a vector inst from a given vector bit name.
// *****************************************************************************
oaModVectorInstBit*
CallbacksIn::getInst(const oaScalarName	    &libName,
		     const oaScalarName	    &cellName,
		     const oaScalarName	    &viewName,
		     const oaVectorBitName  &instName)
{
    oaScalarName    baseName;
    oaUInt4	    index;

    instName.getBaseName(baseName);
    index = instName.getIndex();

    oaModVectorInstBit *inst = oaModVectorInstBit::find(currentModule, baseName, 
						        index);

    if (!inst || inst->isImplicit()) {
	inst = oaModVectorInstBit::create(currentModule, libName, cellName, 
					  viewName, baseName, index);
    }

    return inst;
}



// *****************************************************************************
// CallbacksIn::getModAndNetName()
//
// This function splits a hierarchical net name into a module name and a
// non-hierarchical net name.
// *****************************************************************************
void
CallbacksIn::getModAndNetName(const oaName  &name,
			      oaScalarName  &moduleName,
			      oaName	    &netName)
{
    oaNameBase	*base;
    oaString	buf(256);
    oaUInt4	start;
    oaUInt4	stop;
    oaInt4	step;

    switch (name.getType()) {
       case oacScalarNameType:
	 base =	(oaNameBase*) name.getScalar();
	 break;

       case oacVectorBitNameType:
	 base =	(oaNameBase*) name.getVectorBit();
	 getStartStopStep(name, start, stop, step);
	 buf.format("[%d]", start);
	 break;

       case oacVectorNameType:
	 base =	(oaNameBase*) name.getVector();
	 getStartStopStep(name, start, stop, step);
	 buf.format("[%d:%d]", start, stop);
	 break;
    }

    if (!base->isHier()) {
	netName	= name;
	return;
    }

    oaUInt4 elts = base->getNumMembers();

    if (elts > 2) {
	throw Error(HierNaming, fileAndLine);
    }

    oaNameMem	    basemem = (*base)[elts - 1];
    oaString	    value = basemem.getValue();
    oaNativeNS	    ns;
    oaSimpleName    nativeMem(ns, value);

    nativeMem.get(vns, value);
    value += buf;
    netName.init(vns, value);

    if (elts > 1) {
	value = (*base)[elts - 2].getValue();
	nativeMem.init(ns, value);
	nativeMem.get(vns, value);
	moduleName.init(vns, value);
    }
}



// *****************************************************************************
// CallbacksIn::getNet()
//
// This function finds or creates the given net based on the given name. The
// netType and signedOpt are used only if the net needs to be created. If
// the net already exists then the netType and signedOpt have no effect. If the
// given name is a scalar name, the rangeOpt may modify the name to make it a
// bus name.  If the given name is already a bus or bit name then the rangeOpt
// must be NULL unless we are running in "tolerant" mode (which will cause the
// range to be ignored).  The specified signal type may be modified if the 
// specified name represents a special name such as the tie high or tie low 
// net.
// *****************************************************************************
oaModNet*
CallbacksIn::getNet(const oaName	&nameIn,
		    const oaSigTypeEnum	requestedType,
		    const oaString	*signedOpt,
		    const Range		*rangeOpt,
		    const oaBoolean	warn)
{
    oaUInt4 numMem;

    switch (nameIn.getType()) {
      case oacScalarNameType:
	numMem = nameIn.getScalar()->getNumMembers();
	break;

      case oacVectorNameType:
	numMem = nameIn.getVector()->getNumMembers();
	break;

      case oacVectorBitNameType:
	numMem = nameIn.getVectorBit()->getNumMembers();
	break;

      case oacBundleNameType:
	numMem = 1;
	break;
    }

    if (numMem == 1) {
	return getLocalNet(nameIn, requestedType, signedOpt, rangeOpt, false, 
			   warn);
    }

    return getHierNet(nameIn, requestedType, signedOpt, rangeOpt, warn);
}



// *****************************************************************************
// CallbacksIn::getNet()
//
// This function finds or creates a bundle net from a given bundle name.
// Additionally, since bundle members are always implicit (unless they are 
// explicitly created) a separate net is created for each member of the bundle
// so attributes such as oaSigType can be associated with the bundle members.
// *****************************************************************************
oaModBundleNet*
CallbacksIn::getNet(const oaBundleName	&nameIn,
		    const oaSigTypeEnum	netType,
		    const oaString	*signedOpt,
		    const oaBoolean	warn)
{
    oaBundleName    name;

    expandNetBundleName(nameIn,	name);

    oaModBundleNet  *net = oaModBundleNet::find(currentModule, name);

    if (!net) {
	net = oaModBundleNet::create(currentModule, name);
    }

    oaTermType	termType(oacUnusedTermType);
    oaTermType	memberType(oacUnusedTermType);

    for (oaUInt4 i = 0; i < nameIn.getNumMembers(); i++) {
	oaModNet    *member = getNet(oaName(nameIn[i]), netType, signedOpt, 
				     NULL, warn);

	memberType = getTermType(member);
	
	if (memberType == oacUnusedTermType) {
	    termType = oacUnusedTermType;
	    break;
	} else if (termType != oacUnusedTermType && termType != memberType) {
	    if (warn) {
		oaString	nameStr;

		Options::oaNameToString(nameIn, nameStr);
		warning(Error(InconsistentBundleMembers, &scanner, 
			      (const char*) nameStr));
	    }
	    termType = oacInputOutputTermType;
	    break;
	} else {
	    termType = memberType;
	}
    }

    for (oaUInt4 j = 0; j < nameIn.getNumMembers(); j++) {
	oaModNet    *member = getNet(oaName(nameIn[j]), netType, signedOpt, 
				     NULL, warn);

	if (termType != oacUnusedTermType) {
	    setTermType(member, termType);
	}
    }

    if (termType != oacUnusedTermType) {
	setTermType(net, termType);
    }

    return net;
}



// *****************************************************************************
// CallbacksIn::getNet()
//
// This function finds or creates a scalar net from a given scalar name. 
// *****************************************************************************
oaModNet*
CallbacksIn::getNet(const oaScalarName	&name,
		    const oaSigTypeEnum	netType,
		    const oaString	*signedOpt)
{
    oaModNet	*net = oaModScalarNet::find(currentModule, name);

    if (!net || net->isImplicit()) {
	net = oaModScalarNet::create(currentModule, name, netType);
    }

    return net;
}



// *****************************************************************************
// CallbacksIn::getNet()
//
// This function finds or creates a bus net from a given vector name.
// *****************************************************************************
oaModBusNet*
CallbacksIn::getNet(const oaVectorName	&name,
		    const oaSigTypeEnum	netType,
		    const oaString	*signedOpt)
{
    oaScalarName    baseName;

    name.getBaseName(baseName);

    oaModBusNet	*net = oaModBusNet::find(currentModule, baseName,
					 name.getStart(), name.getStop(), 
					 name.getStep());

    if (!net) {
	// The net may have been previously used as an input or output
	// with the range omitted.  If this is the case, then a scalar net
	// with the same name may already exist.  Replace the existing
	// scalar net with new bus net.
	oaModScalarNet	*scalar	= oaModScalarNet::find(currentModule, baseName);
	oaTermType	termType(oacUnusedTermType);

	if (scalar) {
	    termType = getTermType(scalar);
	    scalar->destroy();
	}

	oaModBusNetDef	*netDef = oaModBusNetDef::find(currentModule, baseName);

	if (!netDef || netDef->isImplicit()) {
	    oaBitOrder order = name.getStart() < name.getStop() 
			       ? oacAscendingBitOrder : oacDescendingBitOrder;

	    netDef = oaModBusNetDef::create(currentModule, baseName, order);
	} else {
	    oaIter<oaModBusNet>	memIter(netDef->getBusNets());
	    oaModBusNet		*member = memIter.getNext();
	    
	    if (member && !member->isImplicit()) {
		termType = getTermType(member);
	    }
	}

	net = oaModBusNet::create(currentModule, name, netType);

	if (termType != oacUnusedTermType) {
	    setTermType(net, termType);
	}
    }

    return net;
}


// *****************************************************************************
// CallbacksIn::getNet()
//
// This function finds or creates a bit net from a given vector bit name. An
// oaModBusNetBit is returned by this function. This function does not
// return implicit nets.
// *****************************************************************************
oaModBusNetBit*
CallbacksIn::getNet(const oaVectorBitName   &name,
		    const oaSigTypeEnum	    netType,
		    const oaString	    *signedOpt)
{
    oaUInt4	    index = name.getIndex();
    oaScalarName    baseName;

    name.getBaseName(baseName);

    oaModBusNetBit  *net = oaModBusNetBit::find(currentModule, baseName, index);

    if (!net || net->isImplicit()) {
	// The net may have been previously used as an input or output with
	// the range omitted. If this is the case, then a scalar net with the
	// same name may already exist. Replace the existing scalar net with
	// new bus net.
	oaModScalarNet	*scalar	= oaModScalarNet::find(currentModule, baseName);
	oaTermType  	termType(oacUnusedTermType);

	if (scalar && !scalar->isImplicit()) {
	    termType = getTermType(scalar);
	    scalar->destroy();
	}

	oaModBusNetDef	*netDef = oaModBusNetDef::find(currentModule, baseName);

	if (!netDef || netDef->isImplicit()) {
	    netDef = oaModBusNetDef::create(currentModule, baseName,
					    oacDescendingBitOrder);
	}

	net = oaModBusNetBit::create(currentModule, baseName, index, netType);

	if (termType != oacUnusedTermType) {
	    setTermType(net, termType);
	}
    }

    return net;
}



// *****************************************************************************
// CallbacksIn::getHierNet()
//
// This function finds or creates a hierarchical net based on the given name. 
// The only hierarchical net that is supported are global nets, so there must
// be only one hierarchical member and the module must be the name of the 
// global module.
// *****************************************************************************
oaModNet*
CallbacksIn::getHierNet(const oaName	    &name,
			const oaSigTypeEnum requestedType,
			const oaString	    *signedOpt,
			const Range	    *rangeOpt,
			const oaBoolean	    warn)
{
    oaName	    baseName;
    oaBoolean	    global;

    resolveNetHier(name, baseName, global);

    return getLocalNet(baseName, requestedType, signedOpt, rangeOpt, global, 
		       warn);
}



// *****************************************************************************
// CallbacksIn::getLocalNet()
//
// This function finds or creates a local net based on the given name.  These
// nets are explicitly not hierarchical.
// *****************************************************************************
oaModNet*
CallbacksIn::getLocalNet(const oaName		&name,
			 const oaSigTypeEnum	requestedType,
			 const oaString		*signedOpt,
			 const Range		*rangeOpt,
			 oaBoolean		global,
			 const oaBoolean	warn)
{
    oaModNet	*net = NULL;
    oaBoolean	expanded = false;
    oaNameType	nameType = name.getType();

    switch (nameType) {
      case oacScalarNameType:
	expandNetScalarName(*name.getScalar(), rangeOpt, expandedName);
	nameType = expandedName.getType();
	expanded = true;
	break;

      case oacVectorNameType:
      case oacVectorBitNameType:
      case oacBundleNameType:
	if (rangeOpt &&	!options.testTolerate()) {
	    notImplemented(MultiDimensionalNetsImpl);
	}
	break;
    }

    oaSigTypeEnum   netType;
    
    if (requestedType == oacSignalSigType) {
	netType = getSigType(expanded ? expandedName : name);

	if (netType == oacTieHiSigType || netType == oacTieLoSigType) {
	    global = true;
	}
    } else {
	netType = requestedType;
    }

    switch (nameType) {
      case oacScalarNameType:
	net = getNet(expanded ? *expandedName.getScalar() : *name.getScalar(), 
	             netType, signedOpt);
	break;

      case oacVectorNameType: 
	net = getNet(expanded ? *expandedName.getVector() : *name.getVector(),
	             netType, signedOpt);
	break;

      case oacVectorBitNameType: 
	net = getNet(expanded ? *expandedName.getVectorBit() 
	                      : *name.getVectorBit(), netType, signedOpt);
	break;

      case oacBundleNameType:
	if (name.getBundle()->getNumMembers() == 1
	    && (*name.getBundle())[0].getRepeat() == 1) {
	    const oaSimpleName	&bitName = (*name.getBundle())[0];

	    switch (bitName.getType()) {
	      case oacScalarNameType:
		net = getNet(*bitName.getScalar(), netType, signedOpt);
		break;

	      case oacVectorNameType:
		net = getNet(*bitName.getVector(), netType, signedOpt);
		break;

	      case oacVectorBitNameType:
		net = getNet(*bitName.getVectorBit(), netType, 
				      signedOpt);
		brea