📄 reg_comp.fit.eqn
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--A1L93Q is result~reg0 at LC2_6_E1
--operation mode is normal
A1L93Q_lut_out = !A1L33 & !A1L43 & !A1L23 & !A1L13;
A1L93Q = DFFE(A1L93Q_lut_out, GLOBAL(clk), GLOBAL(reset), , !read_comp);
--A1L03Q is dout10[3]~reg0 at LC6_6_E1
--operation mode is normal
A1L03Q_lut_out = din10[3];
A1L03Q = DFFE(A1L03Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L72Q is dout10[2]~reg0 at LC5_7_E1
--operation mode is normal
A1L72Q_lut_out = din10[2];
A1L72Q = DFFE(A1L72Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L52Q is dout10[1]~reg0 at LC9_6_E1
--operation mode is normal
A1L52Q_lut_out = din10[1];
A1L52Q = DFFE(A1L52Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L32Q is dout10[0]~reg0 at LC5_6_E1
--operation mode is normal
A1L32Q_lut_out = din10[0];
A1L32Q = DFFE(A1L32Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L02Q is dout1[3]~reg0 at LC1_6_E1
--operation mode is normal
A1L02Q_lut_out = din1[3];
A1L02Q = DFFE(A1L02Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L81Q is dout1[2]~reg0 at LC6_7_E1
--operation mode is normal
A1L81Q_lut_out = din1[2];
A1L81Q = DFFE(A1L81Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L61Q is dout1[1]~reg0 at LC8_6_E1
--operation mode is normal
A1L61Q_lut_out = din1[1];
A1L61Q = DFFE(A1L61Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L41Q is dout1[0]~reg0 at LC10_6_E1
--operation mode is normal
A1L41Q_lut_out = din1[0];
A1L41Q = DFFE(A1L41Q_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L92);
--A1L13 is process0~102 at LC3_6_E1
--operation mode is normal
A1L13 = din1[3] & (din10[1] $ A1L52Q # !A1L02Q) # !din1[3] & (A1L02Q # din10[1] $ A1L52Q);
--A1L23 is process0~103 at LC7_6_E1
--operation mode is normal
A1L23 = din1[1] & (din10[0] $ A1L32Q # !A1L61Q) # !din1[1] & (A1L61Q # din10[0] $ A1L32Q);
--A1L33 is process0~104 at LC4_6_E1
--operation mode is normal
A1L33 = din1[0] & (din10[3] $ A1L03Q # !A1L41Q) # !din1[0] & (A1L41Q # din10[3] $ A1L03Q);
--A1L43 is process0~105 at LC2_7_E1
--operation mode is normal
A1L43 = din1[2] & (din10[2] $ A1L72Q # !A1L81Q) # !din1[2] & (A1L81Q # din10[2] $ A1L72Q);
--A1L92 is dout10[3]~8 at LC3_7_E1
--operation mode is normal
A1L92 = read_comp & !RE;
--din10[1] is din10[1] at PIN_97
--operation mode is input
din10[1] = INPUT();
--din1[3] is din1[3] at PIN_84
--operation mode is input
din1[3] = INPUT();
--din10[0] is din10[0] at PIN_64
--operation mode is input
din10[0] = INPUT();
--din1[1] is din1[1] at PIN_60
--operation mode is input
din1[1] = INPUT();
--din10[3] is din10[3] at PIN_62
--operation mode is input
din10[3] = INPUT();
--din1[0] is din1[0] at PIN_104
--operation mode is input
din1[0] = INPUT();
--din1[2] is din1[2] at PIN_71
--operation mode is input
din1[2] = INPUT();
--din10[2] is din10[2] at PIN_112
--operation mode is input
din10[2] = INPUT();
--clk is clk at PIN_95
--operation mode is input
clk = INPUT();
--reset is reset at PIN_127
--operation mode is input
reset = INPUT();
--read_comp is read_comp at PIN_103
--operation mode is input
read_comp = INPUT();
--RE is RE at PIN_30
--operation mode is input
RE = INPUT();
--result is result at PIN_79
--operation mode is output
result = OUTPUT(A1L93Q);
--dout10[3] is dout10[3] at PIN_76
--operation mode is output
dout10[3] = OUTPUT(A1L03Q);
--dout10[2] is dout10[2] at PIN_78
--operation mode is output
dout10[2] = OUTPUT(A1L72Q);
--dout10[1] is dout10[1] at PIN_29
--operation mode is output
dout10[1] = OUTPUT(A1L52Q);
--dout10[0] is dout10[0] at PIN_26
--operation mode is output
dout10[0] = OUTPUT(A1L32Q);
--dout1[3] is dout1[3] at PIN_101
--operation mode is output
dout1[3] = OUTPUT(A1L02Q);
--dout1[2] is dout1[2] at PIN_75
--operation mode is output
dout1[2] = OUTPUT(A1L81Q);
--dout1[1] is dout1[1] at PIN_80
--operation mode is output
dout1[1] = OUTPUT(A1L61Q);
--dout1[0] is dout1[0] at PIN_27
--operation mode is output
dout1[0] = OUTPUT(A1L41Q);
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