📄 lpm_rom_10.vhd
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-- megafunction wizard: %LPM_ROM%
-- GENERATION: STANDARD
-- VERSION: WM1.0
-- MODULE: lpm_rom
-- ============================================================
-- File Name: LPM_ROM_10.vhd
-- Megafunction Name(s):
-- lpm_rom
-- ============================================================
-- ************************************************************
-- THIS IS A WIZARD-GENERATED FILE. DO NOT EDIT THIS FILE!
--
-- 4.0 Build 214 3/25/2004 SP 1 SJ Full Version
-- ************************************************************
--Copyright (C) 1991-2004 Altera Corporation
--Any megafunction design, and related netlist (encrypted or decrypted),
--support information, device programming or simulation file, and any other
--associated documentation or information provided by Altera or a partner
--under Altera's Megafunction Partnership Program may be used only
--to program PLD devices (but not masked PLD devices) from Altera. Any
--other use of such megafunction design, netlist, support information,
--device programming or simulation file, or any other related documentation
--or information is prohibited for any other purpose, including, but not
--limited to modification, reverse engineering, de-compiling, or use with
--any other silicon devices, unless such use is explicitly licensed under
--a separate agreement with Altera or a megafunction partner. Title to the
--intellectual property, including patents, copyrights, trademarks, trade
--secrets, or maskworks, embodied in any such megafunction design, netlist,
--support information, device programming or simulation file, or any other
--related documentation or information provided by Altera or a megafunction
--partner, remains with Altera, the megafunction partner, or their respective
--licensors. No other licenses, including any licenses needed under any third
--party's intellectual property, are provided herein.
LIBRARY ieee;
USE ieee.std_logic_1164.all;
LIBRARY lpm;
USE lpm.lpm_components.all;
ENTITY LPM_ROM_10 IS
PORT
(
address : IN STD_LOGIC_VECTOR (9 DOWNTO 0);
inclock : IN STD_LOGIC ;
q : OUT STD_LOGIC_VECTOR (9 DOWNTO 0)
);
END LPM_ROM_10;
ARCHITECTURE SYN OF lpm_rom_10 IS
SIGNAL sub_wire0 : STD_LOGIC_VECTOR (9 DOWNTO 0);
COMPONENT lpm_rom
GENERIC (
intended_device_family : STRING;
lpm_width : NATURAL;
lpm_widthad : NATURAL;
lpm_address_control : STRING;
lpm_outdata : STRING;
lpm_file : STRING;
lpm_type : STRING
);
PORT (
address : IN STD_LOGIC_VECTOR (9 DOWNTO 0);
inclock : IN STD_LOGIC ;
q : OUT STD_LOGIC_VECTOR (9 DOWNTO 0)
);
END COMPONENT;
BEGIN
q <= sub_wire0(9 DOWNTO 0);
lpm_rom_component : lpm_rom
GENERIC MAP (
intended_device_family => "ACEX1K",
lpm_width => 10,
lpm_widthad => 10,
lpm_address_control => "REGISTERED",
lpm_outdata => "UNREGISTERED",
lpm_file => "sin_rom.mif",
lpm_type => "LPM_ROM"
)
PORT MAP (
address => address,
inclock => inclock,
q => sub_wire0
);
END SYN;
-- ============================================================
-- CNX file retrieval info
-- ============================================================
-- Retrieval info: PRIVATE: WidthData NUMERIC "10"
-- Retrieval info: PRIVATE: WidthAddr NUMERIC "10"
-- Retrieval info: PRIVATE: INTENDED_DEVICE_FAMILY STRING "ACEX1K"
-- Retrieval info: PRIVATE: SingleClock NUMERIC "0"
-- Retrieval info: PRIVATE: UseDQRAM NUMERIC "0"
-- Retrieval info: PRIVATE: RegAddr NUMERIC "1"
-- Retrieval info: PRIVATE: RegOutput NUMERIC "0"
-- Retrieval info: PRIVATE: BYTE_ENABLE NUMERIC "0"
-- Retrieval info: PRIVATE: BYTE_SIZE NUMERIC "1"
-- Retrieval info: PRIVATE: AclrByte NUMERIC "0"
-- Retrieval info: PRIVATE: AclrAddr NUMERIC "0"
-- Retrieval info: PRIVATE: AclrOutput NUMERIC "0"
-- Retrieval info: PRIVATE: Clken NUMERIC "0"
-- Retrieval info: PRIVATE: CLOCK_ENABLE_INPUT_A NUMERIC "0"
-- Retrieval info: PRIVATE: CLOCK_ENABLE_OUTPUT_A NUMERIC "0"
-- Retrieval info: PRIVATE: ADDRESSSTALL_A NUMERIC "0"
-- Retrieval info: PRIVATE: RegAdd NUMERIC "1"
-- Retrieval info: PRIVATE: OutputRegistered NUMERIC "0"
-- Retrieval info: PRIVATE: MIFfilename STRING "sin_rom.mif"
-- Retrieval info: PRIVATE: MEGAFN_PORT_INFO_0 STRING "address;inclock;outclock;memenab;q"
-- Retrieval info: CONSTANT: INTENDED_DEVICE_FAMILY STRING "ACEX1K"
-- Retrieval info: CONSTANT: LPM_WIDTH NUMERIC "10"
-- Retrieval info: CONSTANT: LPM_WIDTHAD NUMERIC "10"
-- Retrieval info: CONSTANT: LPM_ADDRESS_CONTROL STRING "REGISTERED"
-- Retrieval info: CONSTANT: LPM_OUTDATA STRING "UNREGISTERED"
-- Retrieval info: CONSTANT: LPM_FILE STRING "sin_rom.mif"
-- Retrieval info: CONSTANT: LPM_TYPE STRING "LPM_ROM"
-- Retrieval info: USED_PORT: address 0 0 10 0 INPUT NODEFVAL address[9..0]
-- Retrieval info: USED_PORT: q 0 0 10 0 OUTPUT NODEFVAL q[9..0]
-- Retrieval info: USED_PORT: inclock 0 0 0 0 INPUT NODEFVAL inclock
-- Retrieval info: CONNECT: @address 0 0 10 0 address 0 0 10 0
-- Retrieval info: CONNECT: q 0 0 10 0 @q 0 0 10 0
-- Retrieval info: CONNECT: @inclock 0 0 0 0 inclock 0 0 0 0
-- Retrieval info: LIBRARY: lpm lpm.lpm_components.all
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10.vhd TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10.inc FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10.cmp TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10.bsf TRUE FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10_inst.vhd FALSE
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10_waveforms.html TRUE
-- Retrieval info: GEN_FILE: TYPE_NORMAL LPM_ROM_10_wave*.jpg FALSE
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