frequ.fit.summary

程序用VHDL实现： 利用一秒定时测量频率 并且显示

Flow Status : Successful - Wed Aug 10 16:32:36 2005
Quartus II Version : 4.2 Build 157 12/07/2004 SJ Full Version
Revision Name : frequ
Top-level Entity Name : control
Family : FLEX10K
Device : EPF10K20TC144-4
Timing Models : Final
Met timing requirements : N/A
Total logic elements : 2 / 1,152 ( < 1 % )
Total pins : 4 / 102 ( 3 % )
Total memory bits : 0 / 12,288 ( 0 % )