pulse.sim.qmsg

用vhdl实现脉冲宽度可控的一简单程序 仿真环境MAXPLUS-

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.1 Build 181 06/29/2004 SJ Full Version " "Info: Version 4.1 Build 181 06/29/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Jul 20 17:12:23 2005 " "Info: Processing started: Wed Jul 20 17:12:23 2005" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --import_settings_files=on --export_settings_files=off pulse -c pulse " "Info: Command: quartus_sim --import_settings_files=on --export_settings_files=off pulse -c pulse" {  } {  } 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" "     29.51 % " "Info: Simulation coverage is      29.51 %" {  } {  } 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "1995 " "Info: Number of transitions in simulation is 1995" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 0 s " "Info: Quartus II Simulator was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Jul 20 17:12:24 2005 " "Info: Processing ended: Wed Jul 20 17:12:24 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0}  } {  } 0}