asm.c

This free cpu-ip! use verilog

/*
 * asm.c -- xr16 assembler
 *
 * Copyright (C) 1999, 2000, Gray Research LLC.  All rights reserved.
 * The contents of this file are subject to the XSOC License Agreement;
 * you may not use this file except in compliance with this Agreement.
 * See the LICENSE file.
 *
 * $Log: /dist/src/xr16/asm.c $
 * 
 * 3     4/06/00 11:55a Jan
 * fix #18, #19
 * 
 * 2     3/04/00 9:44a Jan
 * getting automatic rebuild to work
 * applying proper rcsids
 * 
 * 1     3/02/00 8:36p Jan
 *
 * tabs=4
 */

static char rcsid[] =
	"$Header: /dist/src/xr16/asm.c 3     4/06/00 11:55a Jan $\n"
	"Copyright (C) 1999,2000, Gray Research LLC.  All rights reserved.\n"
	"This program is subject to the XSOC License Agreement.\n"
	"See the LICENSE file.";

#include <stdlib.h>
#include <stdio.h>
#include <string.h>
#include <ctype.h>
#include <stdarg.h>
#include <time.h>
#include <assert.h>
#include "xr16.h"
#include "xr16sim.h"

typedef struct Symbol {
	char id[32];
	Addr addr;
	short file;			// index of file symbol defined in; 0 if global
	Bool defined;		// symbol has been defined
	Bool error;			// undefined symbol error has been issued
} Symbol, *Sym;

typedef enum Type {
	SYM='s', COLON=':', IN='i', REG='r', CON='1', COMMA=',', EOL='\n'
} Type;

typedef struct Token {
	Type type;
	union {
		int in;
		Sym sym;
		int reg;
		int con;
	} u;
} Token;

typedef enum FixupType {
	FIX_ADDR, FIX_LDST, FIX_BR, FIX_CALL
} FixupType;

typedef struct Fixup {
	FixupType type;
	Sym target;
	Addr addr;
	int disp;
} Fixup;

typedef struct Line {
	Addr addr;
	SZ szLine;
} Line;
enum { NLINES = 50000 };
int nlines = 0;
Line lines[NLINES];
void addListingLine(SZ line);
 
Bool constant(char** pp, int *pcon);
Bool ea(char** pp, Sym* psym, int* pdisp, int* preg);
Bool address(char** pp, Sym* psym, int* pdisp);
Bool longreg(int reg);
int pairreg(int reg);
Token lex(char** p);
Bool parse(char** p, ...);
Sym lookup(SZ sz);

Addr here();
int lastDestReg();
void label(Sym sym);
void global(Sym sym);
void align(unsigned alignment);
void insn(unsigned in, unsigned w);
void bss(unsigned c);
void byte(unsigned i);
void word(unsigned i);
void fixup(FixupType type, Sym target, int disp);

void nop();
void mov(int rd, int ra);
void ldst(int in, int rd, Sym sym, int disp, int reg);
void addi(int in, int rd, int ra, int con);
void ri(int in, int rd, int con);

Insn mpininsn[];

int error(SZ szError, ...);

static int file = 0; // index of current file

void source(SZ source)
{
	FILE* src;
	char szLine[BUFSIZ];

	szCurrentFile = source;
	line = 0;
	++file;

	if ((src = fopen(source, "rb")) == 0) {
		error("cannot open '%s' (%s)", source, strerror(errno));
		return;
	}

	_snprintf(szLine, sizeof szLine, "# file %s", source);
	szLine[sizeof(szLine)-1] = 0;
	addListingLine(szLine);

	while (fgets(szLine, sizeof szLine, src)) {
		Token t, t2, rd, ra, rb, lab;
		int con;
		char* p = szLine;
		Sym sym = 0;
		int disp = 0;
		int reg = 0;
		int i;

		/* Strip white space, esp. newlines */
		for (i = strlen(szLine) - 1; i >= 0 && isspace(szLine[i]); --i)
			szLine[i] = 0;

		++line;

		addListingLine(szLine);

		/* "label:" */
		t = lex(&p);
		if (t.type == SYM) {
			t2 = lex(&p);
			if (t2.type != COLON) {
				error("syntax error: %s", szLine);
				continue;
			}
			label(t.u.sym);
			t = lex(&p);
		}

		if (t.type == EOL)
			continue;
		else if (t.type != IN) {
 			error("syntax error; expecting opcode");
			continue;
		}

		switch (t.u.in) {
		case ADD:
		case SUB:
			if (!parse(&p, REG, &rd, ',', REG, &ra, ',', REG, &rb, EOL, 0))
				continue;
			if (rb.u.reg == lastDestReg() && rb.u.reg != 0) {
				if (t.u.in == SUB || ra.u.reg == lastDestReg() && ra.u.reg != 0) {
					/* Since the B register port does not get result
					 * forwarding, insert a nop between insn which computes
					 * a result and this RR instruction which uses it.
					 */
					nop();
				}
				else {
					/* Swap the A and B operands:
					 * lw r1,...
					 * add r2,r3,r1 => add r2,r1,r3
					 */
					Token t = ra;
					ra = rb;
					rb = t;
				}
			}
			insn(t.u.in, INSN_RD(rd.u.reg) | INSN_RA(ra.u.reg) | INSN_RB(rb.u.reg));
			break;
		case ADDI:
		case SUBI:	/* subi rd,ra,imm  =>  addi rd,ra,-imm */
			if (!parse(&p, REG, &rd, ',', REG, &ra, ',', 0) || !constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			addi(t.u.in, rd.u.reg, ra.u.reg, con);
			break;
		case AND: case OR: case XOR: case ANDN:
		case ADC: case SBC:
			if (!parse(&p, REG, &rd, ',', REG, &rb, EOL, 0))
				continue;
			if (rb.u.reg == lastDestReg() && rb.u.reg != 0) {
				/* Since the B register port does not get result
				 * forwarding, insert a nop between insn which computes
				 * a result and this RR instruction which uses it.
				 */
				nop();
			}
			insn(t.u.in, INSN_RD(rd.u.reg) | INSN_RB(rb.u.reg));
			break;
		case ANDI: case ORI: case XORI: case ANDNI:
		case ADCI: case SBCI:
			if (!parse(&p, REG, &rd, ',', 0) || !constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			ri(t.u.in, rd.u.reg, con);
			break;
		case SRLI: case SRAI: case SLLI: case SRXI: case SLXI:
			if (!parse(&p, REG, &rd, ',', 0) || !constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			if (con < 1 || con > 15) {
				error("invalid shift amount");
				con = 1;
			}
			for ( ; con > 0; --con)
				insn(t.u.in, INSN_RD(rd.u.reg) | INSN_I4(1));
			break;
		case LW: case LB:
		case SW: case SB:
		case JAL:
			if (!parse(&p, REG, &rd, ',', 0) || !ea(&p, &sym, &disp, &reg))
				continue;
			ldst(t.u.in, rd.u.reg, sym, disp, reg);
			break;
		case LBS: /* lbs rd,imm(ra)  => lb rd,imm(ra) || xori rd,0x80 || subi rd,rd,0x80 */
			if (!parse(&p, REG, &rd, ',', 0) || !ea(&p, &sym, &disp, &reg))
				continue;
			ldst(LB, rd.u.reg, sym, disp, reg);
			ri(XORI, rd.u.reg, 0x80);
			addi(SUBI, rd.u.reg, rd.u.reg, 0x80);
			break;
		case LL:
		case SL:
			if (!parse(&p, REG, &rd, ',', 0) || !ea(&p, &sym, &disp, &reg))
				continue;
			t.u.in = (t.u.in == LL) ? LW : SW;
			ldst(t.u.in, rd.u.reg, sym, disp+2, reg);
			ldst(t.u.in, pairreg(rd.u.reg), sym, disp, reg);
			break;
		case BR:   case BRN:  case BEQ:  case BNE:
		case BC:   case BNC:  case BV:   case BNV:
		case BLT:  case BGE:  case BLE:  case BGT:
		case BLTU: case BGEU: case BLEU: case BGTU:
		{
			if (!parse(&p, SYM, &lab, EOL, 0))
				continue;
			fixup(FIX_BR, lab.u.sym, 0);
			insn(t.u.in, 0);
			break;
		}
		case CALL:
			if (!parse(&p, SYM, &lab, EOL, 0))
				continue;
			fixup(FIX_CALL, lab.u.sym, 0);
			insn(CALL, 0);
			break;
		case TRAP:
			if (!constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			insn(TRAP, con);
			break;

		case NOP: /* nop => and r0, r0 */
			if (!parse(&p, EOL, 0))
				continue;
			nop();
			break;
		case MOV: /* mov rd,ra  =>  add rd,ra,r0 */
			if (!parse(&p, REG, &rd, ',', REG, &ra, EOL, 0))
				continue;
			mov(rd.u.reg, ra.u.reg);
			break;
		case CMP: /* cmp ra,rb  =>  sub r0,ra,rb */
			if (!parse(&p, REG, &ra, ',', REG, &rb, EOL, 0))
				continue;
			if (rb.u.reg == lastDestReg() && rb.u.reg != 0) {
				/* Since the B register port does not get result
				 * forwarding, insert a nop between insn which computes
				 * a result and this RR instruction which uses it.
				 */
				nop();
			}
			insn(SUB, INSN_RD(0) | INSN_RA(ra.u.reg) | INSN_RB(rb.u.reg));
			break;
		case CMPI:
			/* cmpi ra,imm  =>  sub  r0,ra,r0   (imm == 0)
			 *              =>  lea  r1,-32768  (imm == -32768)
			 *                  sub  r0,ra,r1 
			 *              =>  subi r0,ra,imm  (otherwise)
			 */
			if (!parse(&p, REG, &ra, ',', 0) || !constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			if (con == 0)
				insn(SUB, INSN_RD(0) | INSN_RA(ra.u.reg) | INSN_RB(0));
			else if ((Word)con == 0x8000) {
				addi(ADDI, 1, 0, con);
				nop();
				insn(SUB, INSN_RD(0) | INSN_RA(ra.u.reg) | INSN_RB(1));
			}
			else
				addi(SUBI, 0, ra.u.reg, con);
				
			break;
		case LEA: /* lea rd,imm(ra)  =>  addi rd,ra,imm */
			if (!parse(&p, REG, &rd, ',', 0) || !ea(&p, &sym, &disp, &reg))
				continue;
			if (sym)
				fixup(FIX_LDST, sym, disp);
			if (sym || disp < -8 || disp > 7)
				insn(IMM, INSN_I12(disp >> 4));
			insn(ADDI, INSN_RD(rd.u.reg) | INSN_RA(reg) | INSN_I4(disp));
			break;
		case J: /* j ea  =>  jal r0,ea */
			if (!ea(&p, &sym, &disp, &reg))
				continue;
			ldst(JAL, 0, sym, disp, reg);
			break;
		case RET: /* ret  =>  jal r0,0(r15) */
			if (!parse(&p, EOL, 0))
				continue;
			insn(JAL, INSN_RD(0) | INSN_RA(15) | INSN_I4(0));
			break;
		case RETI: /* reti  =>  jal r0,0(r14) */
			if (!parse(&p, EOL, 0))
				continue;
			insn(JAL, INSN_RD(0) | INSN_RA(14) | INSN_I4(0));
			break;
		case SEXT: /* sext rd,ra =>  mov(opt) rd,ra || and rd,0xFF || xor rd,0x80 || subi rd,0x80 */
		case ZEXT: /* zext rd,ra =>  mov(opt) rd,ra || and rd,0xFF */
			if (!parse(&p, REG, &rd, ',', REG, &ra, EOL, 0))
				continue;
			if (rd.u.reg != ra.u.reg)
				mov(rd.u.reg, ra.u.reg);
			ri(ANDI, rd.u.reg, 0xFF);
			if (t.u.in == SEXT) {
				ri(XORI, rd.u.reg, 0x80);
				addi(SUBI, rd.u.reg, rd.u.reg, 0x80);
			}
			break;

		case ADDL:
		case SUBL:
			if (!parse(&p, REG, &rd, ',', REG, &ra, ',', REG, &rb, EOL, 0) ||
			    !longreg(rd.u.reg) || !longreg(ra.u.reg) || !longreg(rb.u.reg))
				continue;
			t.u.in = (t.u.in == ADDL) ? ADD : SUB;
			if (rd.u.reg != ra.u.reg)
				mov(pairreg(rd.u.reg), pairreg(ra.u.reg));
			insn(t.u.in, INSN_RD(rd.u.reg)   | INSN_RA(ra.u.reg)   | INSN_RB(rb.u.reg));
			insn(t.u.in == ADD ? ADC : SBC, INSN_RD(pairreg(rd.u.reg)) | INSN_RB(pairreg(rb.u.reg)));
			break;
		case ANDL: case ORL: case XORL: case ANDNL:
			if (!parse(&p, REG, &rd, ',', REG, &rb, EOL, 0) ||
			    !longreg(rd.u.reg) || !longreg(rb.u.reg))
				continue;

			t.u.in = t.u.in - ANDL + AND;
			insn(t.u.in, INSN_RD(rd.u.reg) | INSN_RB(rb.u.reg));
			insn(t.u.in, INSN_RD(pairreg(rd.u.reg)) | INSN_RB(pairreg(rb.u.reg)));
			break;
		case MOVL:
			if (!parse(&p, REG, &rd, ',', REG, &ra, EOL, 0) ||
			    !longreg(rd.u.reg) || !longreg(ra.u.reg))
				continue;
			mov(rd.u.reg, ra.u.reg);
			mov(pairreg(rd.u.reg), pairreg(ra.u.reg));
			break;

		case GLOBAL:
			if (!parse(&p, SYM, &t, EOL, 0))
				continue;
			global(t.u.sym);
			break;
		
		case ALIGN:
			if (!constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			else if ((con & (con-1)) != 0) {
				error("alignment %d is not a power of 2", con);
				continue;
			}
			align(con);
			break;

		case BYTE_:
			if (!constant(&p, &disp))
				continue;
			byte(disp);
			break;

		case WORD_:
			if (!address(&p, &sym, &disp))
				continue;
			if (sym)
				fixup(FIX_ADDR, sym, disp);
			word(disp);
			break;

		case BSS: /* bss size */
			if (!constant(&p, &con) || !parse(&p, EOL, 0))
				continue;
			if (con > 0) {
				if ((con & 1) == 0)
					align(2);
				bss(con);
			}
			else {
				error("bss %d is not positive", con);
				continue;
			}
			break;

		default:
			error("unexpected token");
			continue;
		}
	}

	if (ferror(src) || fclose(src))
		error("error reading '%s' (%s)", source, strerror(errno));

	szCurrentFile = 0;
	line = 0;
}

void nop()
{
	insn(AND, 0);
}

void mov(int rd, int ra)
{
	insn(ADD, INSN_RD(rd) | INSN_RA(ra) | INSN_RB(0));
}

void ldst(int in, int rd, Sym sym, int disp, int reg)
{
	if (sym) {
		fixup(FIX_LDST, sym, disp);
		insn(IMM, 0);
	}
	else if (in == LW || in == SW || in == JAL) {
		if (disp & 1)
			error("odd offset");
		else if (disp < 0 || disp > 30)
			insn(IMM, INSN_I12(disp >> 4));
		else
			disp = ((disp>>1)<<1)|((disp&0x10)>>4);
	}
	else if (disp < 0 || disp > 15) {
		insn(IMM, INSN_I12(disp >> 4));
	}

	if ((in == SW || in == SB) && rd == lastDestReg() && rd != 0) {
		/* Since the store register port does not get result
		 * forwarding, insert a nop between insn which computes
		 * a result and a store instruction which sources that result.
		 */
		nop();
	}

	insn(in, INSN_RD(rd) | INSN_RA(reg) | INSN_I4(disp));
}

void addi(int in, int rd, int ra, int con)
{
	if (in == SUBI) {
		in = ADDI;
		con = -con;
	}
	if (con < -8 || con > 7)
		insn(IMM, INSN_I12(con >> 4));
	insn(ADDI, INSN_RD(rd) | INSN_RA(ra) | INSN_I4(con));
}

void ri(int in, int rd, int con)
{
	if (con < -8 || con > 7)
		insn(IMM, INSN_I12(con >> 4));
	insn(in, INSN_RD(rd) | INSN_I4(con));
}

Bool constant(char** pp, int *pcon)
{
	Token t;
	Bool neg = FALSE;

	*pcon = 0;

	t = lex(pp);
	if (t.type == '-') {
		neg = TRUE;
		t = lex(pp);
	}
	if (t.type == CON) {
		*pcon = neg ? -t.u.con : t.u.con;
		return TRUE;
	}
	else
		return FALSE;
}

/* address parser.
 * address ::= [SYM | CON ] { ['+' | '-'] CON }*
 */
Bool address(char** pp, Sym* psym, int* pdisp)
{
	Token t;

	*psym  = 0;
	*pdisp = 0;

	t = lex(pp);
	if (t.type == SYM) {
		*psym = t.u.sym;
		t = lex(pp);
	}
	else if (t.type == CON) {
		*pdisp = t.u.con;
		t = lex(pp);
	}
	else
		return FALSE;

	while (t.type == '+' || t.type == '-') {
		Bool add = t.type == '+';
		t = lex(pp);
		if (t.type != CON)
			return FALSE;
		*pdisp = add ? *pdisp + t.u.con : *pdisp - t.u.con;
		t = lex(pp);
	}
	return (t.type == EOL);
}

/* effective address parser.
 * ea ::= [SYM | CON | ] { ['+' | '-'] CON }* { '(' REG ')' }
 */
Bool ea(char** pp, Sym* psym, int* pdisp, int* preg)
{
	Token t;

	*psym  = 0;
	*pdisp = 0;
	*preg  = 0;

	t = lex(pp);
	if (!(t.type == SYM || t.type == CON || t.type == '+' || t.type == '-' || t.type == '('))
		return FALSE;

	if (t.type == SYM) {
		*psym = t.u.sym;
		t = lex(pp);
	}
	else if (t.type == CON) {
		*pdisp = t.u.con;
		t = lex(pp);
	}
	while (t.type == '+' || t.type == '-') {
		Bool add = t.type == '+';
		t = lex(pp);
		if (t.type != CON)
			return FALSE;
		*pdisp = add ? *pdisp + t.u.con : *pdisp - t.u.con;
		t = lex(pp);
	}
	if (t.type == '(') {
		t = lex(pp);
		if (t.type == REG)
			*preg = t.u.reg;
		else
			return FALSE;
		t = lex(pp);
		if (t.type != ')')
			return FALSE;
		t = lex(pp);
	}
	return (t.type == EOL);
}

Bool longreg(int reg)
{
	if (0 <= reg && reg <= 11)
		return TRUE;
	else {
		error("r%d is not a long register name", reg);
		return FALSE;
	}
}

int pairreg(int reg)
{
	return (reg != 0) ? reg + 1 : 0;
}


typedef struct {
	SZ sz;
	Token token;
} SzToken;

SzToken tokens[];

Token lex(char** pp)
{
	char* p1;
	char c;
	Token t;

	memset(&t, 0, sizeof t);

	/* skip white space */
	while (**pp && isspace(**pp))
		++*pp;

	p1 = *pp;

	if (!**pp || **pp == ';') {
		/* end of line, or comment -- do not advance p. */
		t.type = EOL;
	}
	else if (isalpha(**pp) || **pp == '_') {
		int i;

		++*pp;
		while (isalnum(**pp) || **pp == '_')
			++*pp;

		c = **pp;
		**pp = 0;

		for (i = 0; tokens[i].sz; i++) {
			if (strcmp(tokens[i].sz, p1) == 0) {
				**pp = c;
				return tokens[i].token;
			}
		}

		t.type = SYM;
		t.u.sym = lookup(p1);
		**pp = c;